BS616LV2017 Datasheet, PDF (1/9 Pages) Brilliance Semiconductor – Very Low Power/Voltage CMOS SRAM 128K X 16 bit

B S I ^{Very Low Power/Voltage CMOS SRAM}
128K X 16 bit
BS616LV2017
„ FEATURES
• Vcc operation voltage : 4.5V ~ 5.5V
• Very low power consumption :
Vcc = 5.0V C-grade: 60mA (@55ns) operating current
I -grade: 62mA (@55ns) operating current
C-grade: 53mA (@70ns) operating current
I -grade: 55mA (@70ns) operating current
1.0uA(Typ.) CMOS standby current
• High speed access time :
-55
55ns
-70
70ns
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options
• I/O Configuration x8/x16 selectable by LB and UB pin
„ DESCRIPTION
The BS616LV2017 is a high performance , very low power CMOS Static
Random Access Memory organized as 131,072 words by 16 bits and
operates from a range of 4.5V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
1.0uA at 5.0V /25^oC and maximum access time of 55ns at 5.0V / 85^oC.
Easy memory expansion is provided by active LOW chip enable (CE),
active LOW output enable(OE) and three-state output drivers.
The BS616LV2017 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616LV2017 is available in DICE form , JEDEC standard 44-pin
TSOP Type II package and 48-ball BGA package.
„ PRODUCT FAMILY
PRODUCT
FAMILY
BS616LV2017DC
BS616LV2017EC
BS616LV2017AC
BS616LV2017DI
BS616LV2017EI
BS616LV2017AI
OPERATING
TEMPERATURE
Vcc
RANGE
SPEED
( ns )
55ns: 4.5~5.5V
70ns: 4.5~5.5V
+0 ^O C to +70 ^O C 4.5V ~5.5V 55/70
-40 ^O C to +85 ^O C 4.5V ~ 5.5V 55/70
POWER DISSIPATION
STANDBY
( ICCSB1, Max )
Operating
( ICC, Max )
Vcc=5.0V
Vcc=5.0V
55ns
70ns
10uA
60mA
53mA
30uA
62mA
55mA
PKG TYPE
DICE
TSOP2-44
BGA-48-0608
DICE
TSOP2-44
BGA-48-0608
„ PIN CONFIGURATIONS
„ BLOCK DIAGRAM
A4 ¹
A3 ²
A2
3
A1 ⁴
A0 ⁵
CE
6
DQ0
7
DQ1
8
DQ2
9
DQ3
10
VCC ¹¹
GND
12
DQ4
13
DQ5
14
DQ6
15
DQ7
16
WE
17
A16 ¹⁸
A15 ¹⁹
A14 ²⁰
A13 ²¹
A12 ²²
44
43
42
41
40
39
38
37
36
BS616LV2017EC
35
34
BS616LV2017EI 33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
DQ15
DQ14
DQ13
DQ12
GND
VCC
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
NC
1
2
3
4
5
6
A
LB OE A0 A1 A2 N.C.
A8
A13
A15
Address
A16
20
1024
A14
Input
Row
A12
A7
Buffer
Decoder
A6
A5
A4
16
DQ0
.
.
Data
Input
16
Buffer
.
.
.
.
16
.
.
Data
Output
16
DQ15
Buffer
Memory Array
1024 x 2048
2048
Column I/O
Write Driver
Sense Amp
128
Column Decoder
B
D8 UB A3 A4 CE D0
C
D9 D10 A5 A6 D1 D2
D
VSS D11 N.C. A7 D3 VCC
E
VCC D12 N.C. A16 D4 VSS
F
D14 D13 A14 A15 D5 D6
CE
WE
OE
UB
LB
Vcc
Gnd
Control
14
Address Input Buffer
A11 A9 A3 A2 A1 A0 A10
G
D15 N.C. A12 A13 WE D7
H
N.C. A8 A9 A10 A11 ^N.C.
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.
R0201-BS616LV2017
1
Revision 1.1
Jan. 2004