BS616LV1611_06 Datasheet, PDF (1/11 Pages) Brilliance Semiconductor – Very Low Power CMOS SRAM 1M X 16 bit

Very Low Power CMOS SRAM
1M X 16 bit
Pb-Free and Green package materials are compliant to RoHS
BS616LV1611
n FEATURES
Ÿ Wide VCC operation voltage : 2.4V ~ 5.5V
Ÿ Very low power consumption :
VCC = 3.0V Operation current : 46mA (Max.)at 55ns
2mA (Max.) at 1MHz
Standby current : 1.5uA (Typ.) at 25 ^OC
VCC = 5.0V Operation current : 115mA (Max.)at 55ns
10mA (Max.)at 1MHz
Standby current : 6.0uA (Typ.) at 25^OC
Ÿ High speed access time :
-55
55ns(Max.) at VCC=3.0~5.5V
-70
70ns(Max.) at VCC=2.7~5.5V
Ÿ Automatic power down when chip is deselected
Ÿ Easy expansion with CE2, CE1 and OE options
Ÿ I/O Configuration x8/x16 selectable by LB and UB pin.
Ÿ Three state outputs and TTL compatible
Ÿ Fully static operation, no clock, no refresh
Ÿ Data retention supply voltage as low as 1.5V
n DESCRIPTION
The BS616LV1611 is a high performance, very low power CMOS
Static Random Access Memory organized as 1,048,576 by 16 bits
and operates form a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with typical CMOS standby
current of 1.5uA at 3.0V/25^OC and maximum access time of 55ns at
3.0V/85^OC.
Easy memory expansion is provided by an active LOW chip enable
(CE1), active HIGH chip enable (CE2) and active LOW output
enable (OE) and three-state output drivers.
The BS616LV1611 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BS616LV1611 is available in 48-pin TSOP Type I package and
48-ball BGA package.
n POWER CONSUMPTION
PRODUCT
FAMILY
OPERATING
TEMPERATURE
STANDBY
(ICCSB1, Max)
VCC=5.0V VCC=3.0V
BS616LV1611FC
BS616LV1611TC
Commercial
+0^OC to +70^OC
50uA
8.0uA
BS616LV1611FI
BS616LV1611TI
Industrial
-40^OC to +85^OC
100uA
16uA
POWER DISSIPATION
1MHz
VCC=5.0V
10MHz
Operating
(ICC, Max)
fMax.
1MHz
VCC=3.0V
10MHz
9mA 48mA 113mA 1.5mA 19mA
10mA 50mA 115mA 2mA 20mA
fMax.
45mA
46mA
PKG TYPE
BGA-48-0912
TSOP I-48
BGA-48-0912
TSOP I-48
n PIN CONFIGURATIONS
n BLOCK DIAGRAM
A4 1
A3 2
A2 3
A1 4
A0 5
CE1 6
DQ0 7
DQ1 8
DQ2 9
DQ3 10
VCC 11
NC 12
VSS 13
DQ4 14
DQ5 15
DQ6 16
DQ7 17
A19 18
WE 19
A18 20
A17 21
A16 22
A15 23
A14 24
BS616LV1611TC
BS616LV1611TI
1
2
3
4
5
6
A
LB OE A0 A1 A2 CE2
B
D8 UB A3 A4 CE1 D0
C
D9 D10 A5 A6 D1 D2
D VSS D11 A17 A7 D3 VCC
E VCC D12 NC A16 D4 VSS
F
D14 D13 A14 A15 D5 D6
G D15 A19 A12 A13 WE D7
H A18 A8 A9 A10 A11 NC
48 A5
47 A6
46 A7
45 OE
44 UB
43 LB
42 CE2
41 NC
40 DQ15
39 DQ14
38 DQ13
37 DQ12
36 VSS
35 VCC
34 DQ11
33 DQ10
32 DQ9
31 DQ8
30 A8
29 A9
28 A10
27 A11
26 A12
25 A13
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
DQ0
.
.
.
.
.
.
.
.
.
.
.
.
DQ15
CE2
CE1
WE
OE
UB
LB
VCC
VSS
Address
10
Input
Buffer
16
16
Control
Row
Decoder
1024
Memory Array
1024 x 16384
Data
Input
Buffer
Data
Output
Buffer
16
16
16384
Column I/O
Write Driver
Sense Amp
1024
Column Decoder
10
Address Input Buffer
A14 A15 A16 A17 A18 A0 A1 A2 A3 A19
48-ball BGA top view
Brilliance Semiconductor, Inc. reserves the right to change products and specifications without notice.
R0201-BS616LV1611
1
Revision 2.3
May.
2006