BH62UV1601_08 Datasheet, PDF (1/9 Pages) Brilliance Semiconductor – Ultra Low Power/High Speed CMOS SRAM

Ultra Low Power/High Speed CMOS SRAM
2M X 8 bit
Green package materials are compliant to RoHS
BH62UV1601
„ FEATURES
y Wide V_CC low operation voltage : 1.65V ~ 3.6V
y Ultra low power consumption :
V_CC = 3.6V Operation current : 12mA (Max.)at 55ns
2mA (Max.) at 1MHz
Standby current : 30uA (Max.) at 3.6V/85^OC
V_CC = 1.2V Data retention current : 15uA (Max.) at 85^OC
y High speed access time :
-55
55ns (Max.) at V_CC=3.0V
70ns (Max.) at V_CC=1.8V
y Automatic power down when chip is deselected
y Easy expansion with CE1, CE2 and OE options
y Three state outputs and TTL compatible
y Fully static operation, no clock, no refresh
y Data retention supply voltage as low as 1.0V
„ DESCRIPTION
The BH62UV1601 is a high performance, ultra low power CMOS
Static Random Access Memory organized as 2,048K by 8 bits and
operates in a wide range of 1.65V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with maximum standby current of
30uA at Vcc=3.6V at 85^OC and maximum access time of 55/70ns at
Vcc=3.0V/1.8V.
Easy memory expansion is provided by an active LOW chip enable
(CE1), an active HIGH chip enable (CE2) and active LOW output
enable (OE) and three-state output drivers.
The BH62UV1601 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BH62UV1601 is made with two chips of 8Mbit SRAM by stacked
multi-chip-package.
The BH62UV1601 is available in 48-ball BGA package.
„ POWER CONSUMPTION
POWER DISSIPATION
PRODUCT OPERATING
STANDBY
Operating
FAMILY
TEMPERATURE
(I_CCSB1, Max)
(I_CC, Max)
V_CC=3.6V V_CC=1.8V
1MHz
V_CC=3.6V
10MHz
f_Max.
V_CC=1.8V
1MHz 10MHz
f_Max.
PKG TYPE
BH62UV1601AI
Industrial
-40^OC to +85^OC
30uA
25uA
2mA
6mA 12mA 1.5mA 5mA
8mA BGA-48-0608
„ PIN CONFIGURATIONS
1
2
3
4
5
6
A
NC OE A0 A1 A2 CE2
B
NC NC A3 A4 CE1 NC
C DQ0 NC A5 A6 NC DQ4
D VSS DQ1 A17 A7 DQ5 VCC
E VCC DQ2 NC A16 DQ6 VSS
F DQ3 NC A14 A15 NC DQ7
G NC A20 A12 A13 WE NC
H A18 A8 A9 A10 A11 A19
48-ball BGA top view
„ BLOCK DIAGRAM
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
CE1
CE2
WE
OE
VCC
GND
Address
10
Input
Buffer
Row
Decoder
1024
Memory Array
1024 x 16384
8
8
Control
Data
Input
8
Buffer
Data
8
Output
Buffer
16384
Column I/O
Write Driver
Sense Amp
2048
Column Decoder
11
Address Input Buffer
A20 A19 A18 A17 A15 A14 A13 A16 A2 A1 A0
Brilliance Semiconductor, Inc. reserves the right to change products and specifications without notice.
Detailed product characteristic test report is available upon request and being accepted.
R0201-BH62UV1601
1
Revision 1.2
Oct.
2008