TISP8200M Datasheet, PDF (9/11 Pages) Bourns Electronic Solutions – COMPLEMENTARY BUFFERED-GATE SCRS FOR DUAL POLARITY SLIC OVERVOLTAGE PROTECTION

TISP8200M & TISP8201M
Voltage Stress Levels on the TISP8200M and TISP8201M (Continued)
Testing transistor CB and SCR AK off state: The highest AK voltage occurs during the overshoot period of the protector. To make sure that the
SCR blocking junction does not break down during this period, a d.c. test for off-state current can be applied at the overshoot voltage value.
To avoid transistor CB current amplification by the transistor gain, the transistor base-emitter is shorted during this test (see Figure 8).
Summary: Two tests are needed to verify the protector junctions. Maximum current values for IR and ID are required.
0V
RING
OR
TIP
TISP
8201M
AE
V_BATR
B (G)
KC
AC
B (G)
V_BATH
KE
T ISP
8200M
Figure 6. Protector Electrodes
0V
AI8XAH
I_R
V_(BO)
8201M
A ^IEB
I_R
(internal)
T ISP
8201M
B (G)
V_BATR
0V
I_R
(internal)
B (G)
V_BATH
V_(BO)
K
8200M
I_EB
TISP
8200M
I_R
Figure 7. Reverse Current Verification
0V
AI8XAJ
I_D
V_(BO)
8201M
I_D
(internal)
0V
V_(BO)
8200M
I_D
(internal)
K
A
T ISP
8201M
B (G)
I_CB
0V
I_CB
B (G)
T ISP
8200M
I_D
AI8XAK
Figure 8. Off-State Current Verification
MAY 1998 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.