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C650 Datasheet, PDF (4/6 Pages) Bourns Electronic Solutions – Transient Blocking Units - TBU™ Devices | |||
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TBU⢠C650 and C850 Protectors
Product Dimensions
B
A
K
J
K
J
C
E
F
E
N
3
21
H
PIN 1
TOP VIEW
Recommended Pad Layout
0.70
(.028)
2.625
(.103)
1.15
(.045)
3.55
(.140)
D
N
SIDE VIEW
BOTTOM VIEW
Pad Designation
Pad #
Apply
1
In/Out
2
NC
3
In/Out
NC = Solder to PCB; do not make electrical
connection, do not connect to ground.
Dim.
A
B
C
D
E
F
H
J
K
N
Min.
3.90
(.154)
8.15
(.321)
0.80
(.031)
0.000
(.000)
2.55
(.100)
1.10
(.043)
3.45
(.136)
0.20
(.008)
0.65
(.026)
0.20
(.008)
Typ.
4.00
(.157)
8.25
(.325)
0.85
(.033)
0.025
(.001)
2.60
(.102)
1.15
(.045)
3.50
(.138)
0.25
(.010)
0.70
(.028)
0.25
(.010)
DIMENSIONS:
MM
(INCHES)
Max.
4.10
(.161)
8.35
(.329)
0.90
(.035)
0.050
(.002)
2.65
(.104)
1.20
(.047)
3.55
(.140)
0.30
(.012)
0.75
(.030)
0.30
(.012)
TBU⢠protectors have matte-tin termination ï¬nish. Suggested layout should use non-solder mask deï¬ne (NSMD). Recommended stencil
thickness is 0.10-0.12 mm (.004-.005 in.) with stencil opening size 0.025 mm (.0010 in.) less than the device pad size. As when heat sinking
any power device, it is recommended that, wherever possible, extra PCB copper area is allowed. For minimum parasitic capacitance, do not
allow any signal, ground or power signals beneath any of the pads of the device.
Thermal Resistances
Symbol
Rth(j-a)
Parameter
Junction to leads (package)
Value
116
Unit
°C/W
Reï¬ow Proï¬le
Proï¬le Feature
Average Ramp-Up Rate (Tsmax to Tp)
Preheat
- Temperature Min. (Tsmin)
- Temperature Max. (Tsmax)
- Time (tsmin to tsmax)
Time maintained above:
- Temperature (TL)
- Time (tL)
Peak/Classiï¬cation Temperature (Tp)
Time within 5 °C of Actual Peak Temp. (tp)
Ramp-Down Rate
Time 25 °C to Peak Temperature
Pb-Free Assembly
3 °C/sec. max.
150 °C
200 °C
60-180 sec.
217 °C
60-150 sec.
260 °C
20-40 sec.
6 °C/sec. max.
8 min. max.
Speciï¬cations are subject to change without notice.
Customers should verify actual device performance in their speciï¬c applications.
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