TISP9110MDM Datasheet, PDF (1/5 Pages) Bourns Electronic Solutions – INTEGRATED COMPLEMENTARY BUFFERED-GATE SCRS FOR DUAL POLARITY SLIC OVERVOLTAGE PROTECTION

*RoHS ^COMPLIANT
TISP9110MDM
INTEGRATED COMPLEMENTARY BUFFERED-GATE SCRS
FOR DUAL POLARITY SLIC OVERVOLTAGE PROTECTION
TISP9110MDM Overvoltage Protector
High Performance Protection for SLICs with +ve and -ve
Battery Supplies
– Wide -110 V to +110 V Programming Range
– Low 5 mA max. Gate Triggering Current
– Dynamic Protection Performance Specified for
International Surge Waveshapes
Applications include:
– Wireless Local Loop
– Access Equipment
– Regenerated POTS
– VOIP Applications
Rated for International Surge Wave Shapes
Wave Shape
2/10
10/700
10/1000
Standard
GR-1089-CORE
ITU-T K.20/21/45
GR-1089-CORE
I_PPSM
A
150
80
50
8-SOIC (210 mil) Package (Top View)
(Tip or Ring) Line 1
(-V_(BAT)) G1
2
(+V_(BAT)) G2
3
(Ring or Tip) Line 4
8 NC
7 Ground
6 Ground
5 NC
NC - No internal connection
Terminal typical application names shown in
parenthesis
MD-8SOIC(210)-003-a
Device Symbol
Line
Description
The Model TISP9110MDM is a programmable overvoltage
protection device designed to protect modern dual polarity supply
rail ringing SLICs (Subscriber Line Interface Circuits) against
overvoltages on the telephone line. Overvoltages can be caused
by lightning, a.c. power contact and induction. Four separate
protection structures are used; two positive and two negative
to provide optimum protection during Metallic (Differential) and
Longitudinal (Common Mode) protection conditions in both polar-
ities. Dynamic protection performance is specified under typical
international surge waveforms from Telcordia GR-1089-CORE,
ITU-T K.44 and YD/T 950.
G1
G2
Ground
Line
SD-TISP9-001-a
The Model TISP9110MDM is programmed by connecting the G1
and G2 gate terminals to the negative (-V_(BAT)) and positive (+V_(BAT)) SLIC Battery supplies respectively. This creates a protector operating at
typically +1.4 V above +V_(BAT) and -1.4 V below -V_(BAT) under a.c. power induction and power contact conditions. The protector gate circuitry
incorporates 4 separate buffer transistors designed to provide independent control for each protection element. The gate buffer transistors
minimize supply regulation issues by reducing the gate current drawn to around 5 mA, while the high voltage base emitter structures eliminate
the need for expensive reverse bias protection gate diodes.
The Model TISP9110MDM is rated for common surges contained in regulatory requirements such as ITU-T K.20, K.45, Telcordia GR-1089-
CORE, YD/T 950. With the use of appropriate overcurrent protection devices such as the Bourns^® Multifuse^® and Telefuse^™ devices, circuits
can be designed to comply with modern telecom standards.
How To Order
Device
TISP9110MDM
Package
8-SOIC (210 mil)
Carrier
Embossed Tape Reeled
Order As
Marking Code
TISP9110MDMR-S
9110M
Standard Quantity
2000
*RoHS Directive 2002/95/EC Jan. 27, 2003 including annex and RoHS Recast 2011/65/EU June 8, 2011.
APRIL 2013 - REVISED NOVEMBER 2013
Specifications are subject to change without notice.
The device characteristics and parameters in this data sheet can and do vary in different applications and actual device performance may vary over time.
Users should verify actual device performance in their specific applications.