TISP8200HDM Datasheet, PDF (1/7 Pages) Bourns Electronic Solutions – COMPLEMENTARY BUFFERED-GATE SCRS FOR DUAL POLARITY SLIC OVERVOLTAGE PROTECTION

*RoHS ^COMPLIANT
TISP8200HDM BUFFERED P-GATE SCR DUAL
TISP8201HDM BUFFERED N-GATE SCR DUAL
COMPLEMENTARY BUFFERED-GATE SCRS
FOR DUAL POLARITY SLIC OVERVOLTAGE PROTECTION
TISP820xHDM Overvoltage Protectors
High Performance Protection for SLICs with +ve & -ve
Battery Supplies
TISP8200HDM Negative Overvoltage Protector
– Wide -20 to -110 V Programming Range
– Low +15 mA Max. Gate Triggering Current
– High -150 mA Min. Holding Current
TISP8201HDM Positive Overvoltage Protector
– Wide +20 to +110 V Programming Range
– Low -15 mA Max. Gate Triggering Current
– +20 mA Min. Holding Current
Rated for International Surge Wave Shapes
Wave Shape
2/10
10/700
10/1000
Standard
GR-1089-CORE
ITU-T K.20/21/45
GR-1089-CORE
I_PPSM
A
500
150
100
..................................................UL Recognized Component
TISP8200HDM 8-SOIC (210 mil) Package (Top View)
(Tip) K1
1
8 K1 (Tip)
(-V_(BAT)) G
2
NC
3
(Ring) K2
4
7 A (Ground)
6 A (Ground)
5 K2 (Ring)
NC - No internal connection
Terminal typical application names shown in parenthesis
MD-8SOIC(210)-007-a
TISP8200HDM Device Symbol
K1 K1
A
G
A
Circuit Application Diagram
SLIC
PROTECTION
Tip
C1
220 nF
C2
220 nF
Ring
TISP8200HDM TISP8201HDM
+V_BAT
- V_BAT
AI-TISP8-002-b
K2 K2
SD-TISP8-001-a
TISP8201HDM 8-SOIC (210 mil) Package (Top View)
(Tip) A1
1
8 A1 (Tip)
(+V_(BAT)) G
2
NC
3
(Ring) A2
4
7 K (Ground)
6 K (Ground)
5 A2 (Ring)
NC - No internal connection
Terminal typical application names shown in parenthesis
MD-8SOIC(210)-008-a
TISP8201HDM Device Symbol
A1 A1
K
G
K
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex
OCTOBER 2005 — REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
A2 A2
SD-TISP8-002-a