CDSC706-0504C_12 Datasheet, PDF (1/4 Pages) Bourns Electronic Solutions – Surface Mount TVS Diode Array

*RoHS ^COMPLIANT
Features
■ Lead free as standard
■ RoHS compliant*
■ Low capacitance - 1.3 pF
■ ESD protection >25 kV
■ Surge protection
Applications
■ Personal Digital Assistants (PDAs)
■ Notebook and PC computers
■ Memory card protection
■ SIM card port protection
■ Portable electronics
CDSC706-0504C - Surface Mount TVS Diode Array
General Information
The CDSC706-0504C device provides ESD, EFT and Surge protection for high speed
data ports meeting IEC 61000-4-2 (ESD), IEC 61000-4-4 (EFT) and IEC 61000-4-5
5
(Surge) requirements. The Transient Voltage Suppressor array, protecting up to 4 data
lines, offers a Working Peak Reverse Voltage of 5 V and Minimum Breakdown Voltage
of 6 V.
1
3
4
6
The SC70-6L packaged device will mount directly onto the industry standard SC70-6
2
footprint. Bourns^® Chip Diodes conform to JEDEC standards, are easy to handle with
standard pick and place equipment and the flat configuration minimizes roll away.
Thermal Characteristics (@ T_A = 25 °C Unless Otherwise Noted)
Parameter
Symbol
CDSC706-0504C
Unit
Peak Pulse Power (tp = 8/20 µs)
I_PP
6.5
A
Storage Temperature
TSTG
-55 to +150
ºC
Operating Temperature
T_OPR
-55 to +85
ºC
Operating Supply Voltage
VDC
6
V
ESD per IEC61000-4-2 (Air) (I/O Pins)
18
ESD per IEC61000-4-2 (Contact) (I/O Pins)
Vesd _IO
14
kV
ESD per IEC61000-4-2 (Air) (V_CC to GND)
ESD per IEC61000-4-2 (Contact) (V_CC to
GND)
Vesd _VCC
30
30
kV
DC Voltage at any I/O Pin
VIO
(GND-0.5) to (VCC+0.5)
V
Electrical Characteristics (@ T_A = 25 °C Unless Otherwise Noted)
Parameter
Symbol
CDSC706-0504C
Unit
Maximum Reverse Standoff Voltage ¹
V_RWM
5.0
V
Maximum Leakage Current ¹ @ V_RWM
I_L
5.0
µA
Maximum Channel Leakage Current @ V_RWM
I_CD
1.0
µA
Minimum Reverse Breakdown Voltage ¹
@ I_BV=1 mA
V_BR
6.0
V
Maximum Forward Voltage ⁴ @ I_F = 15 mA
V_F
1.0
V
Maximum Clamping Voltage ² @ 5 A 8/20 µs
V_C
9.0
V
Typical ESD Clamping Voltage- I/O ²
V_{clamp io}
12.5
V
Maximum Channel Input Capacitance ²
@ V_PIN5=5 V, V_PIN2=0 V, V_IN=2.5 V, f=1 MHz
C_IN
1.6
pF
Max. Channel to Channel Input Capacitance ³
@ V_PIN5=5 V, V_PIN2=0 V, V_IN=2.5 V, f=1 MHz
C_CROSS
0.14
pF
Max. Variation of Channel Input Capacitance
@ V_PIN5=5 V, V_PIN2=0 V, V_IN=2.5 V, f=1 MHz
ΔC_IN
0.07
pF
(I/O Pin to GND)
Notes: 1: Pin 5 to Pin 2 (ground)
2: Pin 1, 3, 4 or 6 to Pin 2 (ground)
3: Between any two of pins 1, 3, 4, 6.
4: Pin 2 (ground) to Pin 5
*RoHS Directive 2002/95/EC Jan. 27, 2003 including annex and RoHS Recast 2011/65/EU June 8, 2011.
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.