CAT16-LV2F61 Datasheet, PDF (1/1 Pages) Bourns Electronic Solutions – Concave Chip Array

Features
s HIGH PERFORMANCE TERMINATION
NETWORK
s Miniaturized circuitry and packaging
for space reduction
s Designed for gigabit communication
networks
s Controlled impedance
CAT16-LV2F6 - Concave Chip Array
Electrical Characteristics
Resistance
R1 .............................................165 ohms
R2 .............................................140 ohms
TCR.........................................±200ppm/ ˚C
Temperature Range ...........-55˚C to +125˚C
Max. Operating Voltage ....................5 VDC
Max. Power Resistance ................. .0625W
Solderability ......................>95% Coverage
Product Dimensions
.60 ± .10
(.024 ± .004)
8
7
6
5
.45 ± .10
(.018 ± .004)
.30 ± .10
(.012 ± .004)
DIA.
1.60 ± .15
(.063 ± .060)
.40 ± .10
(.016 ± .004)
.80 ± .10
(.031 ± .004)
1
DIMENSIONS ARE: ^METRIC
(INCHES)
3.20 ± .15
(.126 ± .006)
2
3
4
.40 ± .10
(.016 ± .004)
Packaging Specifications
5000 pcs - per 7" reel
1.1
(.043)
1.9 ± .15
(.075 ± .006)
3.6 ± .20
(.142 ± .008)
4.0 ±.10
(.158 ±.004)
4.0 ± .10
(.157 ± .004)
2.0 ± .05
(.079 ± .002)
1.5 +.10/-0
(.060 +.004/-0)
3.5 ± .05
(.138 ± .002) _{8.0 ± .05}
(.138 ± .012)
1.75 ± .10
(.069 ± .004)
21 ± 0.5
(.827 ± .020)
12.5 ± 2
(.492 ± .079)
13
(.512
±
±
0.5
.020)
DIA.
60.0 ± 1.0
(2.36 ± .039)
DIA.
178.0 ± 2.0
(7.008 ± .080)
10.0 ± 1.5
(.394 ± .059)
Derating Curve
100
80
60
40
20
0
-55
0
70
125
(°C) Ambient temperature
Schematic
8
7
6
5
R2
R1
R1
R2
R1
R1
1
2
3
4
REV. 11/01
Specifications are subject to change without notice.