BCM8220_04 Datasheet, PDF (2/2 Pages) Broadcom Corporation. – 2.488/2.667 GBPS ULTRA LOW POWER SONET/SDH TRANSCEIVER

OVERVIEW
RESET
TCK4IP
TCK4IN
FIFO
Control
Write
Pointer
OVF
DI0P
DI0N
DI3P
DI3N
SEL2P5G
REFCKP
REFCKN
REF155EN
RTSYNC
RDIN1P
RDIN1N
RDIN2P
RDIN2N
SELRD1
LOSBDLYEN
CKSEL
KILLRXCLK
KILLRXDAT
LOSIB
LINELBB
SYSLBB
TSTLBB
M
U
X
Loop-
back
Logic
Read
Pointer
2.488/2.666
M
GHz PLL
U
X
Output
Retime
B
M
U
X
DIVIDE-BY-4
CDR
M
U
DIVIDE-BY-4
X
TXDP
TXDN
TXCKP
TXCKN
TCK4OP
TCK4ON
LCKDET_CMU
DO0P
DO0N
DO3P
DO3
RCK4OP
RCK4ON
LCKDET_CDR
LOSB
The BCM8220 FEC-capable (Forward Error Correction), SONET/SDH
transceiver is a fully integrated, SONET OC-48 (2.488/2.667 Gbps)
interface serialization/deserialization device with an integrated clock
multiplication unit (CMU) and integrated clock and data recovery (CDR)
circuit. Output frequency is selectable at 2.488 Gbps or 2.667 Gbps,
allowing use of the FEC capability.
On-chip clock synthesis is performed by the high-frequency, low-jitter,
phase-locked loop on the BCM8220 transceiver chip, allowing the use of
slower 77.76/155.52-MHz (83.35/166.71-MHz) external transmit clock
references.
Clock recovery is performed by synchronizing the on-chip VCO directly
to the incoming data stream. The low-jitter, LVDS interface guarantees
bit error compliance with the Telcordia GR-253-CORE, ANSI, and ITU-
T standards. The BCM8220 is packaged in a 14 x 14 mm, 100-pin LQFP
package or an 11 x 11 mm, 100-pin BGA package.
Transmitter functions include:
• 4-bit parallel input
• Elastic buffering
• 2.488/2.666 GHz clock generation
• Parallel-to-serial conversion
• Serial differential data output
Receiver functions include:
• 2.488/2.666 Gbps differential data input
• Clock and data recovery
• Serial-to-parallel conversion
• 4-bit parallel output
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®
BROADCOM CORPORATION
16215 Alton Parkway, P.O. Box 57013
Irvine, California 92619-7013
© 2004 by BROADCOM CORPORATION. All rights reserved.
8220-PB08-R
07/02/04
Phone: [phone]
Fax: [phone]
E-mail: [e-mail]
Web: www.broadcom.com