MGA-665P8 Datasheet, PDF (1/13 Pages) Agilent(Hewlett-Packard) – GaAs Enhancement-Mode PHEMT 0.5 - 6 GHz Low Noise Amplifier

MGA-665P8
GaAs Enhancement-Mode PHEMT
0.5 – 6 GHz Low Noise Amplifier
Data Sheet
Description
Avago’s MGA-665P8 is an economical, easy-to-use
GaAs MMIC Low Noise Amplifier (LNA) with a unique
active-low power-down function. The LNA has low
noise figure and high gain achieved through the use of
Avago Technologies’ proprietary GaAs Enhancement-
mode PHEMT process. It is housed in a miniature 2.0 x
2.0 x 0.75 mm 8-pin Leadless-Plastic-Chip-Carrier (LPCC)
package. The compact footprint and low profile coupled
with low noise, high gain and high linearity makes the
MGA-665P8 an ideal choice as an LNA for broadband
general-purpose applications. Its excellent broadband
isolation also makes it a good buffer amplifier.
The output of the MGA-665P8 provides a very good
broadband match to 50 Ω. Its input requires a simple
external LC network to provide a low noise figure and
good input return loss. Power supply voltage is applied
to both the output terminal and a separate V_D terminal.
A simple external bias insertion circuit consisting of a
shunt inductor and a series dc block capacitor is suf-
ficient to apply power supply voltage to the output of
the MGA-665P8. The MGA-665P8 provides typical device
performance of 1.45 dB noise figure, 16 dB gain and an
OIP3 of +18.1 dBm at 5.25 GHz, at a bias point of 3 V and
20.5 mA.
Features
• Surface Mount, 2.0 x 2.0 x 0.75 mm 8-lead LPCC
• Active-low power-down function
• Single +3 V supply operation
• Low noise and high gain MMIC
• Output 50 Ω match
• Excellent isolation
• Minimal match and external biasing components
• Housed in miniature 2 x 2 x 0.75 mm LPCC package
• Pb-free & MSL-1 package
Specifications
• 0.5 to 6 GHz operation
• At 3 V, 20.5 mA, 2.4 GHz:
NF = 1.2 dB
Gain = 18.4 dB
OIP3 = 19 dBm
• At 3 V, 20.5 mA, 5.25 GHz:
NF = 1.45 dB
Gain = 16 dB
OIP3 = 18.1 dBm
Pin Configuration, Top View
1: GND
2: RF_IN
3: GND
4: UNUSED
GND PADDLE
8: UNUSED
POWER DOWN FUNCITON:
LOGIC LOW (0-1 V): POWER ON
LOGIC HIGH (2-3 V): POWER OFF
7: RF_OUT & V_D
6: V_D
5: POWERDOWN
NOTES:
1. PINS 1, 3, AND PADDLE NEED TO BE
PROPERLY GROUNDED TO OBTAIN
SPECIFIED PERFORMANCE.
2. SUPPLY VOLTAGE, V_D, NEEDS TO BE
APPLIED AT PINS 6 & 7. SUPPLY AT
PIN 7 TO BE APPLIED USING A BIAS
TEE OR EQUIVALENT.
Attention: Observe precautions for handling electrostatic sensitive devices.
ESD Machine Model = 40 V
ESD Human Body Model = 150 V
Refer to Avago Application Note A004R: Electrostatic Discharge, Damage and Control.