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MGA-14516 Datasheet, PDF (1/14 Pages) AVAGO TECHNOLOGIES LIMITED – High Gain, High Linearity Active Bias Low Noise Amplifier
MGA-14516
High Gain, High Linearity Active Bias Low Noise Amplifier
Data Sheet
Description
Avago Technologies’ MGA-14516 is a two stage, easy-to-
use GaAs MMIC Low Noise Amplifier (LNA) with active
bias. The LNA has low noise with good input return loss
and high linearity achieved through the use of Avago
Technologies’ proprietary 0.5um and 0.25um GaAs En-
hancement-mode pHEMT process. Both LNAs have an
extra feature inside that allows a designer to adjust supply
current. The first stage has an additional feature where the
gain can be adjusted externally without affecting noise
figure. Minimum matching needed for input, output and
the inter-stage between the two LNA.
It is designed for optimum use between 1.4GHz to 2.7GHz.
For optimum performance at lower frequency from
400MHz to 1.5GHz, the MGA-13516 is recommended.
Both MGA-13516 & MGA-14516 share the same package
and pinout.
Pin Configuration and Package Marking
4.0 x 4.0 x 0.85 mm3 16-lead QFN
14516
Pin 12
Pin 1
YYWW
Pin 11
Pin 2
XXXX
Pin 10
Pin 3
Pin 9
Pin 4
Features
x Low noise figure
x High gain
x Good IRL
x High linearity performance
x High reverse isolation
x Externally adjustable supply current
x Externally adjustable gain
x GaAs E-pHEMT Technology [1]
x Low cost QFN package
x Excellent uniformity in product specifications
Specifications
1.95GHz ; Q1 : 5V, 45mA (typ) Q2 : 5V, 110mA
x 31.7 dB Gain
x 0.68 dB Noise Figure
x 13 dB IRL
x 38 dBm Output IP3
x 23.5 dBm Output Power at 1dB gain compression
Applications
x Low noise amplifier for cellular infrastructure including
GSM, CDMA, W-CDMA, TD-SCDMA and WiMAX.
x Other very low noise applications.
TOP VIEW
BOTTOM VIEW
Pin Description Pin Description
1 Not Used 9 Not Used
[1]
[12] 2 NC
10 RFout
[2]
[11] 3 RFin
11 RFout
[3]
[10] 4 RFgnd1
12 Not Used
5 Vbias1
13 Vg
[4]
[9]
6 FB1
14 RFgnd2
7 RFout1
15 Vm
8 RFin2
16 Vbias
Notes:
Package marking provides orientation and identification “14516” is the
Product Identification, “YYWW” is the Date Code, “XXXX” is the last 4
digits of the lot number.
Note:
1. Enhancement mode technology employs positive Vgs, thereby
eliminating the need of negative gate voltage associated with
conventional depletion mode devices.
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 40 V
ESD Human Body Model = 200 V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.