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BCM5704C Datasheet, PDF (1/2 Pages) Broadcom Corporation. – DUAL 10/100/1000BASE-T CONTROLLER WITH INTEGRATED TRANSCEIVER
BCM5704C
®
DUAL 10/100/1000BASE-T CONTROLLER WITH INTEGRATED TRANSCEIVER
FEATURES
SUMMARY OF BENEFITS
• Single-chip, dual-port solution for dual LAN on Motherboard
(LoM) and network interface card (NIC) applications
• Two integrated 10BASE-T/100BASE-TX/1000BASE-T
transceivers
• Two 10/100/1000 triple-speed MACs
• Single host interface
- PCI v2.2 32/64-bit, 33/66 MHz
- PCI-X v1.0 64-bit, 66/100/133 MHz
• Dual ultra-deep 64-KB on-chip packet buffer
• Dual high-speed RISC cores with 16-KB caches
- Programmable, in-line packet classification
• SMBus 2.0 controller
• On-chip power circuit controller and Wake on LAN power
switching circuit
• Performance features
• TCP, IP, UDP checksum
• TCP segmentation
• CPU task offload
• Adaptive interrupts
• Ultra-deep 64-KB packet buffer
• Robust manageability
• PXE 2.0 remote boot
• Alert Standard Format—ASF 1.0 support
• Wake on LAN (WoL)
• Out-of-box WoL
• Intelligent Platform Management Interface (IPMI), ver. 1.5
• Statistic gathering (SNMP MIB II, Ethernet-like MIB, Ethernet
MIB)
• Comprehensive diagnostic and configuration software suite
• ACPI 1.1a-compliant (multiple power modes)
• Advanced network features
• Priority queuing—802.1p Layer 2 priority encoding; support
for four priority queues
• Virtual LANs—802.1q VLAN tagging; support for up to 64
VLANs
• Jumbo frames (9 KB)
• 802.3x flow control
• Advanced server features
• Link aggregation—802.3ad, GEC/FEC, Smart Load Balancing
(supports heterogeneous teams)
• Heterogeneous, mixed speed failover
• Hot-plug PCI support
• Low-power, 0.13-µm CMOS design
• 300-pin HBGA package
• 3.3V I/Os (5V tolerant)
JTAG
• Industry’s smallest dual 10/100/1000 MAC/PHY solution—
power and space optimized for LoM and low-profile NIC
applications
• Completely backward compatible:
• To existing 10/100 network infrastructure
• To existing PCI based desktop and server platforms
• Futureproof
• PCI-X interface, on-chip programmable CPUs, ASF support
• Performance focused—optimized for throughput and CPU
utilization
• Adaptive interrupts
• PCI-X—eliminates PCI bottlenecks
• Ultra-deep 64-KB packet buffer—lowers CPU utilization,
avoids PCI congestion
• Networking task offloads reduces utilization level of CPU
• Robust and highly manageable
• PXE 2.0, ACPI 1.1, Wake on LAN, ASF 1.0, IPMI
• Integrated cable testing (link quality, length, pair skew, pair
polarity, pair swap)
• Advanced features
• VLAN, priority queuing, jumbo frames
• RISC processors for advanced packet classification
• Server class reliability, availability and performance features
• Link aggregation and load balancing
- Switch-dependent
• 802.3ad (LACP), generic trunking (GEC/FEC)
- Switch- and NIC-independent
• Smart Load Balancing (unique technology that supports
heterogeneous teams and can operate with any switch)
• Failover
- Smart Load Balancing allows heterogeneous failover
• Hot-plug PCI
• Low power for zero airflow implementations
• 0.13-µm CMOS design
• Advanced power management
• Space savings for LoM
• 300-pin HBGA package
• No external memory
• Integrated power circuitry