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BCM5703 Datasheet, PDF (1/1 Pages) Broadcom Corporation. – 10/100/1000BASE-T CONTROLLER | |||
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BCM5703
®
10/100/1000BASE-T CONTROLLER WITH INTEGRATED TRANSCEIVER
FEATURES
⢠Single-chip solution for LAN on Motherboard (LOM) and
network interface card (NIC) applications
⢠Integrated 10BASE-T/100BASE-TX/1000BASE-T transceivers
⢠10/100/1000 triple-speed MAC
⢠Host interfaces
- PCI v2.2â32/64 bits, 33/66 MHz
- PCI-X v1.0â64 bits, 66/100/133 MHz
⢠Ultra-deep 96-KB on-chip packet buffer
⢠Dual high-speed RISC cores with 16-KB caches
- Programmable, in-line packet classification
⢠SMBus 2.0 controller
⢠On-chip power circuit controller and Wake on LAN (WOL)
power switching circuit
⢠Performance features:
⢠TCP, IP, UDP checksum
⢠TCP segmentation
⢠CPU task offload
⢠Adaptive interrupts
⢠Ultra-deep 96-KB packet buffer
⢠Robust manageability:
⢠PXE 2.0 remote boot
⢠Alert Standard FormatâASF 1.0 support
⢠Wake on LAN
⢠Out-of-box (OOB) Wake on LAN
⢠Intelligent platform management interface (IPMI), version 1.5
⢠Statistic gathering (SNMP MIB II, Ethernet-like MIB, Ethernet
MIB)
⢠Comprehensive diagnostic and configuration software suite
⢠ACPI 1.1a compliant multiple power modes
⢠Advanced network features:
⢠Priority queuingâ802.1p layer 2 priority encoding; support for
four priority queues
⢠Virtual LANsâ802.1q VLAN tagging; support for up to 64
VLANs
⢠Jumbo frames (9 KB)
⢠802.3x flow control
⢠Advanced server features:
⢠Link aggregationâ802.3ad, GEC/FEC,
Balancing⢠(supports heterogeneous teams)
⢠Heterogeneous, mixed-speed failover
⢠PCI Hot-Plug support
Smart
Load
⢠Low-power, 0.13-um CMOS design
⢠400-pin FBGA package
⢠3.3V I/Os (5V tolerant)
⢠JTAG
SUMMARY OF BENEFITS
⢠Industryâs smallest 10/100/1000 MAC+PHY solutionâpower
and space optimized for LOM and low-profile NIC
applications
⢠Completely backward-compatible:
⢠To existing 10/100 network infrastructure
⢠To existing PCI-based desktop and server platforms
⢠Futureproof
⢠PCI-X interface, on-chip programmable CPUs, ASF support
⢠Performance focusedâoptimized for throughput and CPU
utilization
⢠Adaptive interrupts
⢠PCI-X eliminates PCI bottlenecks
⢠Ultra-deep 96-KB packet buffer lowers CPU utilization and
avoids PCI congestion
⢠CPU task offloads reduces utilization level of CPU
⢠Robust and highly manageable
⢠PXE 2.0, ACPI 1.1a, Wake on LAN, ASF 1.0, IPMI
⢠Integrated cable testingâlink quality, length, pair skew, pair
polarity, pair swap
⢠Advanced features
⢠VLAN, priority queuing, jumbo frames
⢠RISC processors for advanced packet classification
⢠Server class reliability, availability, and performance features
⢠Link aggregation and load balancing
⢠Switch-dependent
⢠802.3ad (LACP), generic trunking (GEC/FEC)
⢠Switch- and NIC-independent
⢠Smart Load Balancingâ¢âunique technology that supports
heterogeneous teams, and can operate with any switch
⢠Failover
⢠Smart Load Balancing allows heterogeneous failover
⢠PCI Hot Plug
⢠Low-power for zero airflow implementations
⢠0.13-um CMOS design
⢠Advanced power management
⢠Space savings for LOM
⢠400-pin FBGA package
⢠No external memory
⢠Integrated power circuitry
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