BLV7002 Datasheet, PDF (1/2 Pages) SHANGHAI BELLING CO., LTD. – BLV7002

BLV7002
BLV7002 N-channel Enhancement Mode
Vertical D-MOS Transistor Chip
Description
N-channel enhancement mode field-effect transistor
Features
Very fast switching
Logic level compatible
Applications
Relay driver
High speed line driver
Logic level translator.
structure
Planar type
Electrodes: Aluminum alloy
Backside metal: Au alloy
Size
Chip size: 495µm ×490µm
Chip thickness: 220±20µm.
Scribe street width: 50µm
Pad size: 90µm x90µm
Die per wafer: 25800
ABSOLUTE MAXIMUM RATING
Symbol
V_DS
V_GS
I_D
I_DM
P_tot
T_STG
T_j
Parameter
Drain – source voltage (DC)
Gate – source voltage (DC)
Drain current (DC)
Peak drain current
Total power dissipation
Storage temperature
Junction temperature
Min.
-
-
-
-
-
-55
-
Max.
60
±20
115
0.46
0.2
+150
150
Unit
V
V
mA
A
W
o_C
o_C
http://www.belling.com.cn
-1-
Total 2 Pages
8/18/2006