BL24C64A Datasheet, PDF (1/17 Pages) SHANGHAI BELLING CO., LTD. – Random and sequential Read modes

BL24C64A 64Kbits (8,192×8)
Features
 Compatible with all I²C bidirectional data
transfer protocol
 Memory array:
– 64 Kbits (8 Kbytes) of EEPROM
– Page size: 32 bytes
– Additional Write lockable page
 Single supply voltage and high speed:
– 1 MHz
 Random and sequential Read modes
 Write:
– Byte Write within 3 ms
– Page Write within 3 ms
– Partial Page Writes Allowed
 Write Protect Pin for Hardware Data Protection
 Schmitt Trigger, Filtered Inputs for Noise
Suppression
 High-reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
 Enhanced ESD/Latch-up protection
– HBM 8000V
 8-lead PDIP/SOP/TSSOP/UDFN and WLCSP4
packages
Description
 The BL24C64A provides 65536 bits of serial
electrically erasable and programmable read-
only memory (EEPROM), organized as 8192
words of 8 bits each.
 The device is optimized for use in many
industrial and commercial applications where
low-power and low-voltage operation are
essential.
 The BL24C64A offers an additional page,
named the Identification Page (32 bytes). The
Identification Page can be used to store
sensitive application parameters which can be
(later) permanently locked in Read-only mode.
Pin Configuration
8-lead PDIP
A0 1
5
A1 2
6
A2
3
7
GND 4
8
VCC A0
WP A1
SCL A2
SDA GND
8-lead SOP
8-lead TSSOP
1
5
VCC A0
1
5
2
6
WP A1
2
6
3
7 SCL A2
3
7
4
8 SDA GND 4
8
8-pad DFN
VCC VCC 1
WP WP 2
SCL SCL 3
SDA SDA 4
5 A0 _A
6 A1
7 A2
8 GND ^B
WLCSP4
1
2
Vcc
Vss
SCL
SDA
Bottem view
Marking side
(top view)
BL24C64A 64Kbits (8,192×8) Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited
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