AZ7500F Datasheet, PDF (2/13 Pages) BCD Semiconductor Manufacturing Limited – PULSE-WIDTH-MODULATION CONTROL CIRCUITS

Preliminary Datasheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
Pin Configuration
AZ7500F
M Package
(SOIC-16)
P Package
(DIP-16)
1IN + ₁
1IN - 2
FEEDBACK ₃
DTC ₄
CT ₅
RT 6
GND 7
C1 8
16 2IN +
15 2IN -
14 ^REF
13 OUTPUT CTRL
12 VCC
11 C2
10 E2
9 E1
1IN + ₁
1IN - ₂
FEEDBACK ₃
DTC 4
CT ₅
RT 6
GND 7
C1 8
16 2IN +
15 2IN -
14 ^REF
13 OUTPUT CTRL
12 V_CC
11 C2
10 E2
9 E1
Figure 2. Pin Configuration of AZ7500F (Top View)
Output Function Control Table
Signal for Output Control
V_I = GND
V_I = V_REF
Output Function
Single-ended or parallel output
Normal push-pull operation
Functional Block Diagram
RT ⁶
5
CT
Oscillator
Dead-Time Control
Comparator
4
DTC
+
0.12V
1
1IN +
1IN - ²
Error Amplifier 1
+
+
PWM
Comparator
2IN + ¹⁶
2IN - ¹⁵
Error Amplifier 2
+
0.7mA
3
FEEDBACK
OUTPUT CTRL
13
Pulse-Steering
Flip-Flop
D
CK
Reference
Regulator
8 _C1
Q1
9 _E1
11 ^C2
Q2
10
E2
12
V_CC
14
REF
7
GND
Figure 3. Functional Block Diagram of AZ7500F
Oct. 2009 Rev. 1. 2
BCD Semiconductor Manufacturing Limited
2