AA4003 Datasheet, PDF (11/18 Pages) BCD Semiconductor Manufacturing Limited – 2W STEREO AUDIO POWER AMPLIFIER WITH SHUTDOWN

Data Sheet
2W STEREO AUDIO POWER AMPLIFIER WITH SHUTDOWN
AA4003
Application Information
C_OUT
_
220μF
+
SE/BTL Mode, HP_SENSE Pin
The AA4003 can operate under 2 types of output
configuration, BTL (Bridged-Tied-Load) mode and SE
(Single-Ended) mode, determined by HP_SENSE pin's
logic level. (Here is the discussion about left channel
only, it equally applies to right channel.)
+
20kΩ
AMP1L
Left Out-
20kΩ
_
+ Left Out+
AMP2L
R_PD
1.5kΩ
Main
Speak
Headphone
Speak
R1 R2
V_DD 100kΩ 100kΩ
C_OUT
_
220μF
+
HP_SENSE= High Level
+
20kΩ
AMP1L
Left Out-
20kΩ
R_PD
1.5kΩ
Figure 20. Output Configuration for Left Channel
_
+ Left Out+
AMP2L
R1
R2
V_DD 100kΩ 100kΩ
Main
Speak
in SE Mode
When headphone plug is not inserted, the voltage of
HP_SENSE pin is determined by voltage divider
formed by R1 and R_PD. For given resistor's value in
Figure 19, R1=100kΩ, R_PD=1.5kΩ, DC voltage at
HP_SENSE= Low Level
SLEEVE ^{HP_SENSE is about 74mV. AC signal equals output}
HEADPHONE amplitude of OUT- through C_OUT, so signal at
JACK
HP_SENSE node is 74mV DC plus AC signal. The
Figure 19. Output Configuration for Left Channel maximum peak-to-peak voltage at OUT- is no greater
in BTL Mode
than V_DD (supply voltage 5.0V), so the positive
When HP_SENSE pin is held low which sets the chip
in BTL mode, the AMP2L unit is turned on. AMP2L
has fixed unity gain internally, AC signal at OUT+ is
180 degree phase shifted from OUT-. Because the DC
component (Output Bias voltage, approx 1/2 V_DD)
between OUT+ and OUT- is canceled, there is no
necessity to use DC block capacitors for main speak. In
BTL mode, output voltage swing across main speaker
is about 2 times that in SE mode, so there is 4 times
maximum voltage of HP_SENSE node will be no
greater than 2.5V+75mV≈2.575V, which is less than
HP_SENSE input high level minimum value (4.0V).
That means the chip is in BTL mode and there is no
risk of operation mode switch between SE and BTL.
When headphone plug is inserted, as the R_PD is
disconnected from R1, the voltage of HP_SENSE pin
is pulled up by R1 to V_DD and sets the chip in SE
mode.
output power compared to SE mode with same load
and input. (see Figure 19)
HP_SENSE pin can also be connected to MCU I/O
port to control the mode switch through MCU.
If applying high level to HP_SENSE pin which sets the
chip in SE mode, the AMP2L unit is in high impedance
state. There is no current loop between OUT+ and
OUT-, the main speak is naturally disabled without any
hardware change. The output audio signal rides on bias
voltage at OUT- (Output Bias voltage, approx 1/2
V_DD) , so it has to use a capacitor C_OUT to block DC
bias and couple AC signal to headphone speak. (See
Figure 20)
It is recommended to connect HP_SENSE to the
headphone jack switch pin illustrated in Figure 19.
It is necessary to note that AA4003 still can drive
headphone even in BTL mode because OUT- is always
active whatever the chip is in SE or BTL mode.
C_IN, C_OUT, Cb and C_S (Power Supply) Selection
For input stages of AA4003, input capacitors C_I is used
to accommodate different DC level between input
source and AA4003 bias voltage (about 2.31V). Input
capacitors C_I and input resistors R_I form a first order
High Pass Filter, which determines the lower corner
frequency according to the classic equation below,
Oct. 2007 Rev. 1. 1
BCD Semiconductor Manufacturing Limited
11