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AZ4052 Datasheet, PDF (1/18 Pages) BCD Semiconductor Manufacturing Limited – Dual 4-channel Analog Multiplexer/Demultiplexer
Preliminary Datasheet
Dual 4-channel Analog Multiplexer/Demultiplexer
AZ4052
General Description
The AZ4052 is high-speed si-gate CMOS device. The
AZ4052 is dual 4-channel analog multiplexers or
demultiplexers with common select logic. Each
multiplexer has four independent inputs/outputs (pins
nY0 to nY3) and a common input/output (pin nZ).
The common channel select logics include two digital
select inputs (pins S0 and S1) and an active LOW
___
___
enable input (pin E). When pin E=LOW, one of the
four switches is selected (Low-impedance On-state)
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with pins S0 and S1. When pin E =HIGH, all
switches are in the high-impedance Off-state,
independent of pins S0 and S1. VCC and GND are the
supply voltage pins for the digital control inputs (pins
___
S0, S1 and E). The VCC to GND ranges are 3.0V to
10V. The analog inputs/outputs (pins nY0 to nY3 and
nZ) can swing between VCC as a positive limit and
VEE as a negative limit. VCC-VEE may not exceed 10V.
For operation as a digital multiplexer/demultiplexer,
VEE is connected to GND (Typically Ground).
The AZ4052 is available in standard packages of
SOIC-16 and DIP-16.
Features
• Wide Operation Voltage: ±5.0V or 10V
• Low On-resistance:
- 55Ω (Typ.) at VCC-VEE=5V
- 40Ω ( Typ.) at VCC-VEE=10V
• Ultra Low THD+N:
0.003% @ 10V, 0.008% @ 5.0V
• Ultra Low Crosstalk: -120dB
• Ultra Low Noise: 6.0μVRMS
• Operating Temperature: -40ºC to 85ºC
Applications
• LCD TV/PDP TV/CRT TV
• 4:1 Multi-channel Signal Selecting
Function Table
Control Input
___
E
S1
S0
L
L
L
L
L
H
L
H
L
L
H
H
H
X
X
On Channel
nY0
nZ
nY1
nZ
nY2
nZ
nY3
nZ
None
SOIC-16
DIP-16
Figure 1. Package Types of AZ4052
Oct. 2011 Rev. 1.1
BCD Semiconductor Manufacturing Limited
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