AZP63_13 Datasheet, PDF (1/12 Pages) Arizona Microtek, Inc – Low Phase Noise Sine Wave / CMOS to LVPECL Buffer / Translator

AZP63
Low Phase Noise Sine Wave / CMOS www.azmicrotek.com
to LVPECL Buffer / Translator
DESCRIPTION
The AZP63 is a sine wave/CMOS to LVPECL buffer/translator optimized
for very low phase noise (-165dBc/Hz). It is particularly useful in
converting crystal or SAW based oscillators into LVPECL outputs for
greater than 1GHz of bandwidth. For lower power consumption and
reduced bandwidth, refer to the AZP5x family.
The AZP63 is one of a family of parts that provide options of fixed ÷1,
fixed ÷2 and selectable ÷1, ÷2 modes as well as active high enable or active
low enable to oscillator designers. Refer to Table 2 for the comparison of
parts within the AZP5x and AZP63 family.
FEATURES
• LVPECL outputs optimized
for very low phase noise
(-165dBc/Hz)
• High bandwidth, > 1GHz
• Selectable ÷1, ÷2 output
• Selectable Enable logic
• 3.0V to 3.6V operation
BLOCK DIAGRAM
V_DD
EN_SEL
PU
pull-up
EN
(PU,PD)
pull-down
D
R_bias
÷1,2
PD
V_DD/2
Q
Q
DIV_SEL
GND
APPLICATIONS
• PECL clock sources
• Crystal or SAW based
oscillators with LVPECL
output
PACKAGE AVAILABILITY
• Available in die
• SON8
• Green/RoHS Compliant/Pb-Free
Order Number
Package
Marking
AZP63QG¹
SON8
E <Date Code>²
1 _{Tape & Reel - Add 'R1' at end of order number for 7in (1k parts), 'R2' (2.5k) for 13in}
2 _{See www.azmicrotek.com for date code format}
www.azmicrotek.com
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1630 S Stapley Dr, Suite 127
Mesa, AZ 85204 USA
Mar 2013, Rev 2.2