AZ12000 Datasheet, PDF (1/13 Pages) Arizona Microtek, Inc – Phase-Locked Loop Clock Generator

ARIZONA MICROTEK, INC.
AZ12000, AZ12001
Phase-Locked Loop Clock Generator
FEATURES
• PECL (AZ12000) or LVDS
(AZ12001) Outputs
• Operating Range 3.0V to 5.5V
• Internal Crystal Oscillator Driver
• Internal Edge-Matching
Phase/Frequency Detector
• Internal Charge-Pump and
Integrator Amplifier
• Internal or External VCO
• Divide by 4, 8, 16, 32
• RF Bipolar Design for Low Phase
Noise
• Available in a 4x4mm MLP Package
DESCRIPTION
PACKAGE AVAILABILITY
PACKAGE
PART NO.
MARKING NOTES
MLP 24 (4x4)
AZ12000K
AZ12000
1,2
<Date Code>
MLP 24 (4x4)
AZ12001K
AZ12001
1,2
<Date Code>
DIE
AZ12000XP
N/A
3
DIE
AZ12001XP
N/A
3
1 Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)
Tape & Reel.
2 Date code format: “YY” for year followed by “WW” for week.
3 Waffle Pack
The AZ12000/AZ12001 contains all of the functional elements necessary to implement a Phase-Locked Loop
for clock multiplication at frequencies up to 800 MHz. A reference crystal oscillator driver operates at frequencies
up to 200 MHz providing support for 4 times multiplication. The dynamic properties of the PLL are under the
control of the user through selection of the desired external components.
BLOCK DIAGRAM
CPPOL CPREF CPOUT INTREF INTSUM
INTOUT
REFOUT
OUTPT
DRVR
4mA
V_EE
REFIN
INPUT
RCVR
470 Ω
V_BB
VBB
CHARGE
PUMP
PHASE/
FREQ
DETECT
INTEGRATOR
VCO
MMUUXX
BUFFER
VCO
OUTPUT
Q
Q
V_CC
VCOV_CC
V_EE
DIVIDE BY
4,8,16,32
DS2 DS1
TANKEXTVCEOXTVCO
VCOSEL
1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • [phone] • FAX [phone]
www.azmicrotek.com