AZ10ELT22_08 Datasheet, PDF (1/6 Pages) Arizona Microtek, Inc – CMOS/TTL to Differential PECL Translator

ARIZONA MICROTEK, INC.
AZ10ELT22
AZ100ELT22
CMOS/TTL to Differential PECL Translator
FEATURES
• Green / RoHS Compliant /
Lead (Pb) Free package available
• 0.5ns Typical Propagation Delay
• <100ps Typical Output to Output
Skew
• Differential PECL Outputs
• Flow Through Pinouts
• Operating Range of 3.0V to 5.5V
• Direct Replacement for ON
Semiconductor MC10ELT22,
MC100ELT22, MC100LVELT22 &
Micrel SY89322V
• IBIS Model Files Available on
Arizona Microtek Website
PACKAGE AVAILABILITY
PACKAGE
PART NUMBER MARKING NOTES
SOIC 8
AZ10ELT22D
AZM10
ELT22
1,2
SOIC 8
AZ100ELT22D
AZM100
ELT22
1,2
SOIC 8 Green /
RoHS Compliant /
Lead (Pb) Free
AZ100ELT22DG
AZM100G
ELT22
1,2
TSSOP 8
AZ100ELT22T
AZH
LT22
1,2
TSSOP 8 Green /
RoHS Compliant /
Lead (Pb) Free
AZ100ELT22TG
AZHG
LT22
1,2
1 Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)
Tape & Reel.
2 Date code “YWW” or “YYWW” on underside of part.
DESCRIPTION
The AZ10/100ELT22 is a dual CMOS/TTL to differential PECL translator. Because PECL (Positive ECL)
levels are used, only V_CC and ground are required. The small outline packaging and the low skew, dual gate design
of the ELT22 makes it ideal for applications that require the translation of a clock and a data signal.
The ELT22 is available in both PECL standards: the 10ELT is compatible with PECL 10K logic levels while
the 100ELT is compatible with PECL 100K logic levels.
NOTE: Specifications in PECL tables are valid when thermal equilibrium is established.
PIN DESCRIPTION
PIN
Q0, Q¯¯0, Q1, Q¯¯1
D0, D1
V_CC
GND
FUNCTION
Differential PECL Outputs
CMOS/TTL Input
Positive Supply
Ground
LOGIC DIAGRAM AND
PINOUT
1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • [phone] • FAX [phone]
www.azmicrotek.com