AZ10EL31 Datasheet, PDF (1/6 Pages) List of Unclassifed Manufacturers – ECL/PECL D Flip-Flop with Set and Reset

ARIZONA MICROTEK, INC.
AZ10EL31
AZ100EL31
ECL/PECL D Flip-Flop with Set and Reset
FEATURES
PACKAGE AVAILABILITY
• 475ps Propagation Delay
PACKAGE PART NUMBER MARKING NOTES
• 2.8GHz Toggle Frequency
SOIC 8
AZ10EL31D
AZM10EL31 1,2
• 75kΩ Internal Input Pulldown Resistors SOIC 8
AZ100EL31D
AZM100EL31 1,2
• Direct Replacement for ON Semiconductor ^{TSSOP 8}
AZ10EL31T
AZTEL31
1,2
MC10EL31 & MC100EL31
TSSOP 8
AZ100EL31T
AZHEL31
1,2
1 Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)
Tape & Reel.
2 Date Code “YWW” on underside of part.
DESCRIPTION
The AZ10/100EL31 is a master-slave D flip-flop with set and reset. The device is functionally equivalent to the
E131 device with higher performance capabilities. With propagation delays and output transition times significantly
faster than the E131, the EL31 is ideally suited for those applications that require the ultimate in AC performance.
Both set and reset inputs are asynchronous, level triggered signals. Data enters the master section of the flip-
flop when the clock is LOW. When the clock transitions from LOW to HIGH, the data in the master section
transfers into the slave section and through to the outputs.
NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.
TRUTH TABLE
D S* R* CLK Q
Q¯
L
L
L
H
L
L
XHL
XLH
XHH
Z
L
H
Z
H
L
X
H
L
X
L
H
X Undef Undef
Z = LOW to HIGH Transition
* Pins will default low when left open
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
S1
D2
S
D
Flip Flop
8 VCC
7Q
PIN DESCRIPTION
PIN
S
D
R
CLK
Q, Q¯
V_CC
V_EE
FUNCTION
Set Input
Data Input
Reset Input
Clock Input
Data Outputs
Positive Supply
Negative Supply
CLK ³
6Q
R
R4
5 _VEE
1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • [phone] • FAX [phone]
www.azmicrotek.com