AZ100LVEL32_12 Datasheet, PDF (1/9 Pages) Arizona Microtek, Inc – PECL/ECL 2 Divider

AZ100LVEL32
PECL/ECL ÷2 Divider
www.azmicrotek.com
DESCRIPTION
The AZ100LVEL32 is an integrated ÷2 divider. The reset pin is
asynchronous and is asserted on the rising edge. Upon power-up, the
internal flip-flop will attain a random logic state; the reset allows for the
synchronization of multiple AZ100LVEL32’s in a system.
The AZ100LVEL32 is a direct replacement for the On Semiconductor
MC100EL/LVEL32
FEATURES
• 3.0+ GHz toggle frequency
• 470ps propagation delay
• Internal input pulldown
resistors
• 3.0V to 5.5V power supply
BLOCK DIAGRAM
APPLICATIONS
• General Applications
PACKAGE AVAILABILITY
• MLP8
• MSOP8
• SOIC8
• Green/RoHS Compliant/Pb-Free
Part Number (PN)
Package
Marking
AZ100LVEL32NG¹
MLP 8
C2G <Date Code>²
AZ100LVEL32TG¹
MSOP 8
AZHGLV32²
AZ100LVEL32DG¹
SOIC 8
AZM100GLVEL3^,2
1 _{Tape & Reel - Add 'R1' at end of PN for 7in (1k parts), 'R2' (2.5k) for 13in}
2 _{See www.azmicrotek.com for date code format}
www.azmicrotek.com
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1630 S Stapley Dr, Suite 127
Mesa, AZ 85204 USA
May 2012, Rev 2.0