AZ100LVEL16VT Datasheet, PDF (1/13 Pages) Arizona Microtek, Inc – ECL/PECL Oscillator Gain Stage & Buffer with Selectable Enable

AZ100LVEL16VT ^{ARIZONA MICROTEK, INC.}
ECL/PECL Oscillator Gain Stage & Buffer with Selectable Enable
FEATURES
• High Bandwidth for ≥1GHz
• Similar Operation as
AZ100LVEL16VR except in
Disabled Condition: Q_HG is High
• Operating Range of 3.0V to 5.5V
• Minimizes External Components
• Selectable Enable Polarity and
Threshold (CMOS/TTL or PECL)
• Available in a 3x3 mm or 2x2 mm
MLP Package
• S-Parameter (.s2p) and IBIS Model
Files Available on Arizona Microtek
Website
DESCRIPTION
PACKAGE AVAILABILITY
PACKAGE
PART NUMBER MARKING NOTES
MLP 8 (2x2x0.75)
AZ100LVEL16VTNA
P9
<Date Code>
1,2,3
MLP 8 (2x2x0.75)
RoHS Compliant /
Lead (Pb) Free
AZ100LVEL16VTNA+
P9+
<Date Code>
1,2
MLP 8 (2x2x0.75)
AZ100LVEL16VTNB
P8
<Date Code>
1,2,4
MLP 8 (2x2x0.75)
RoHS Compliant /
Lead (Pb) Free
AZ100LVEL16VTNB+
P8+
<Date Code>
1,2
MLP 8 (2x2x0.75)
AZ100LVEL16VTNC
P2
<Date Code>
1,2,5
MLP 8 (2x2x0.75)
RoHS Compliant /
Lead (Pb) Free
AZ100LVEL16VTNC+
P2+
<Date Code>
1,2
MLP 8 (2x2x0.75)
AZ100LVEL16VTND
P3
<Date Code>
1,2
MLP 8 (2x2x0.75)
RoHS Compliant /
Lead (Pb) Free
AZ100LVEL16VTND+
P3+
<Date Code>
1,2
AZM
MLP 16 (3x3)
AZ100LVEL16VTL
16T
1,2
<Date Code>
MLP 16 (3x3) RoHS
AZM+
Compliant / Lead (Pb) AZ100LVEL16VTL+ 16T
1,2
Free
<Date Code>
DIE
AZ100LVEL16VTXP N/A
6
1 Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts) Tape
& Reel.
2 Date code format: “Y” or “YY” for year followed by “WW” for week.
3 Parts marked TNA for date codes prior to 4WW (prior to 2004).
4 Parts marked TNB for date codes prior to 4WW (prior to 2004).
5 Parts marked TNC for date codes prior to 4WW (prior to 2004).
6 Waffle Pack
The AZ100LVEL16VT is a specialized oscillator gain stage with high gain output buffer including an enable.
The Q_HG/Q¯ _HG outputs have a voltage gain several times greater than the Q/Q¯ outputs.
MLP 16, 3x3 mm Package (VTL) or DIE (VTX)
The AZ100LVEL16VTL and AZ100LVEL16VTX provide a selectable enable input (EN) that allows
continuous oscillator operation. See truth table for the Enable function. If Enable pull-up is desired in the
CMOS/TTL mode, an external ≤20 kΩ resistor connecting EN to V_CC will override the on-chip pull-down resistor.
When disabled, the Q_HG output is forced high and the Q¯ _HG output is forced low. The AZ100LVEL16VTL/VTX also
provides a V_BB and 470 Ω internal bias resistors from D to V_BB and D¯ to V_BB. The V_BB pin can support 1.5 mA
sink/source current. Bypassing V_BB to ground with a 0.01 μF capacitor is recommended.
The outputs Q and Q¯ each have a selectable on-chip pull-down current source. See truth table below for current
source functions. External resistors may also be used to increase pull-down current to a maximum total of 25 mA.
1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • [phone] • FAX [phone]
www.azmicrotek.com