AZ100LVEL16VR_12 Datasheet, PDF (1/12 Pages) Arizona Microtek, Inc – PECL/ECL Oscillator Gain Stage & Buffer with Selectable Enable

AZ100LVEL16VR
PECL/ECL Oscillator Gain Stage &
Buffer with Selectable Enable
DESCRIPTION
The AZ100LVEL16VR is a specialized oscillator gain stage with a high
gain output buffer including an enable function. The Q_HG/Q¯ _HG outputs have
voltage gain several times greater than the Q/Q¯ outputs. It provides a
selectable Q_HG/Q¯ _HG enable that allows continuous oscillator operation via
the Q/Q¯ outputs.
The AZ100LVEL16VR provides adjustable internal pull-down current
sources for the Q/Q¯ outputs and optional 10mA current sources for the
Q_HG/Q¯ _HG outputs. Internal input biasing further reduces the number of
needed external components
www.azmicrotek.com
FEATURES
• Minimizes External
Components
• Selectable Enable Polarity and
Threshold (CMOS or PECL)
• High Bandwidth for ≥1GHz
• Similar Operation as
AZ100EL16VO
• -147 dBc/Hz Typical Noise
Floor
BLOCK DIAGRAM
APPLICATIONS
• Crystal or saw oscillators that
require minimal external
components.
PACKAGE AVAILABILITY
• MLP8
o Green/RoHS Compliant/Pb-Free
• MLP16
o Green/RoHS Compliant/Pb-Free
Order Number
Package
Marking
AZ100LVEL16VRL¹
MLP16
AZM+16R <Date Code>²
AZ100LVEL16VRNEG¹
MLP8
R5G <Date Code>²
1 _{Tape & Reel - Add 'R1' at end of PN for 7in (1k parts), 'R2' (2.5k) for 13in}
2 _{See www.azmicrotek.com for date code format}
www.azmicrotek.com
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Request a Sample
1630 S Stapley Dr, Suite 127
Mesa, AZ 85204 USA
May 2012, Rev 2.0