AZ100ELT22_12 Datasheet, PDF (1/7 Pages) Arizona Microtek, Inc – Dual CMOS/TTL to Differential PECL Translator

AZ100ELT22
Dual CMOS/TTL to Differential
PECL Translator
DESCRIPTION
The AZ100ELT22 is a dual CMOS/TTL to differential PECL translator.
Because PECL (Positive ECL) levels are used, only V_CC and ground are
required. The small outline packaging and the low skew, dual gate design of
the AZ100ELT22 makes it ideal for applications that require the translation
of a clock and a data signal.
The AZ100ELT22 is a direct replacement for the ON Semi MC100ELT22,
MC100LVELT22 and Micrel SY89322V
www.azmicrotek.com
FEATURES
• 0.5ns typical propagation delay
• <100ps typical output to output
skew
• Differential PECL outputs
• Flow through pinouts
BLOCK DIAGRAM
APPLICATIONS
• LVCMOS/LVTTL to LVPECL
translations
• CMOS/TTL to PECL
translations
PACKAGE AVAILABILITY
• MSOP8
o Green/RoHS/Pb-Free
• SOIC8
o Green/RoHS/Pb-Free
Order Number
Package
Marking
AZ100ELT22DG¹
SOIC8
HT22G²
AZ100ELT22TG¹
MSOP8
HT22G²
1 _{Tape & Reel - Add 'R1' at end of order number for 7in (1k parts), 'R2' (2.5k) for 13in}
2 _{See www.azmicrotek.com for date code format}
www.azmicrotek.com
[phone]
Request a Sample
1630 S Stapley Dr, Suite 127
Mesa, AZ 85204 USA
May 2012, Rev 2.0