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APDS-9900 Datasheet, PDF (8/28 Pages) AVAGO TECHNOLOGIES LIMITED – Digital Proximity and Ambient Light Sensor
PRINCIPLES OF OPERATION
System State Machine
The APDS-9900/9901 provides control of ALS, proximity
detection and power management functionality through
an internal state machine. After a power-on-reset, the
device is in the sleep mode. As soon as the PON bit is set,
the device will move to the start state. It will then continue
through the Prox, Wait and ALS states. If these states are
enabled, the device will execute each function. If the PON
bit is set to a 0, the state machine will continue until all
conversions are completed and then go into a low power
sleep mode.
Sleep
PON = 1 (rO:b0)
PON = 0 (rO:b0)
Start
Prox
ALS
Wait
Figure 6. Simplified State Diagram
NOTE: In this document, the nomenclature uses the bit
field name in italics followed by the register number and
bit number to allow the user to easily identify the register
and bit that controls the function. For example, the power
on (PON) is in register 0, bit 0. This is represented as PON
(r0:b0).
Ch0 and Ch1 Diodes
Conventional silicon detectors respond strongly to infrared
light, which the human eye does not see. This can lead to
significant error when the infrared content of the ambient
light is high (such as with incandescent lighting) due to
the difference between the silicon detector response and
the brightness perceived by the human eye.
This problem is overcome in the APDS-9900/9901 through
the use of two photodiodes. One of the photodiodes,
referred to as the Ch0 channel, is sensitive to both visible
and infrared light while the second photodiode is sensitive
primarily to infrared light. Two integrating ADCs convert
the photodiode currents to digital outputs. The CH1DATA
digital value is used to compensate for the effect of the
infrared component of light on the CH0DATA digital value.
The ADC digital outputs from the two channels are used in
a formula to obtain a value that approximates the human
eye response in units of Lux.
ALS Operation
The ALS engine contains ALS gain control (AGAIN) and
two integrating analog-to-digital converters (ADC) for
the Ch0 and Ch1 photodiodes. The ALS integration time
(ALSIT) impacts both the resolution and the sensitivity
of the ALS reading. Integration of both channels occurs
simultaneously and upon completion of the conversion
cycle, the results are transferred to the Ch0 and CH1 data
registers (CDATAx and IRDATAx). This data is also referred
to as channel “count”. The transfers are double-buffered
to ensure that invalid data is not read during the transfer.
After the transfer, the device automatically moves to
the next state in accordance with the configured state
machine.
Ch0
Ch0
ADC
Data
Ch0
ALS Control
Ch1
Ch1
ADC
Data
Ch1
CDATAH (r0 x 15), CDATAL (r0 x 14)
ATIME (r0 x 01), 0 x ff to 0 x 00
AGAIN (r0 x OF, b1:0), 1x, 8x, 16x, 120 x Gain
IRDATAH (r0 x 17), IRDATAL (r0 x 16)
Figure 7. ALS Operation
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