AFCT-5971LZALZ Datasheet, PDF (7/15 Pages) AVAGO TECHNOLOGIES LIMITED – Single Mode Laser Small Form Factor Fast Ethernet Transceivers

Application Information
The Applications Engineering Group at Avago Tech-
nologies is available to assist you with technical under-
standing and design trade-offs associated with these
transceivers. You can contact them through your Avago
sales representative.
The following information is provided to answer some
of the most common questions about the use of the
parts.
Optical Power Budget and
Link Penalties
The worst-case Optical Power Budget (OPB) in dB for a
fiber-optic link is determined by the difference between
the minimum transmitter output optical power (dBm
avg) and the lowest receiver sensitivity (dBm avg). This
OPB provides the necessary optical signal range to es-
tablish a working fiber-optic link. The OPB is allocated
for the fiber-optic cable length and the corresponding
link penalties. For proper link performance, all penalties
that affect the link performance must be accounted for
within the link optical power budget.
Electrical and Mechanical Interface
Recommended Circuit
Figures 6a and 6b show recommended dc and ac
coupled circuits for deploying the Avago Technologies
transceivers in +3.3 V systems.
Data Line Interconnections
Avago Technologies’ AFCT-5971LZ/ALZ fiber-optic
transceivers are designed to couple to +3.3 V PECL sig-
nals. The transmitter driver circuit regulates the output
optical power. The regulated light output will maintain
a constant output optical power provided the data pat-
tern is reasonably balanced in duty cycle. If the data
duty cycle has long, continuous state times (low or high
data duty cycle), then the output optical power will
gradually change its average output optical power level
to its preset value.
T_DIS (LVTTL)
TERMINATE AT
TRANSCEIVER INPUTS
100 Ω
Z = 50 Ω
Z = 50 Ω
130 Ω
PHY DEVICE
V_CC (+3.3 V)
TD-
130 Ω
LVPECL
TD+
10 9 8 7 6
1 µH
V_CC (+3.3 V)
T_X
C2
C5 *
10 µF
C3
10 µF
V_CC (+3.3 V)
R_X
1 µH
1 23 45
C1
C4 *
10 µF
Z = 50 Ω
100 Ω
RD+
LVPECL
RD-
Z = 50 Ω
V_CC (+3.3 V)
130 Ω 130 Ω
Z = 50 Ω
130 Ω
SD
82 Ω
Note: C1 = C2 = C3 = 10 nF or 100 nF
* C4 AND C5 ARE OPTIONAL BYPASS CAPACITORS FOR ADDITIONAL
LOW FREQUENCY NOISE FILTERING.
Figure 6a. Recommended dc Coupled Interface Circuit
TERMINATE AT
DEVICE INPUTS