ACPL-P314 Datasheet, PDF (6/14 Pages) AVAGO TECHNOLOGIES LIMITED – 0.6 Amp Output Current IGBT Gate Driver Optocoupler

Table 5. Electrical Specifications (DC)
Over recommended operating conditions unless otherwise specified.
Parameter
Symbol Min. Typ. Max. Units Test Conditions
Fig. Note
High Level Output Current
I_OH
0.2
A
V_O = V_CC - 4
2
1
0.4 0.5
A
V_O = V_CC - 10
3
2
Low Level Output Current
I_OL
0.2 0.4
A
V_O = V_EE + 2.5
5
1
0.4 0.5
A
V_O = V_EE + 10
6
2
High Level Output Voltage
V_OH
V_CC-4 V_CC-1.8
V
I_O = -100 mA
1
3, 4
Low Level Output Voltage
V_OL
0.4
1
V
I_O = 100 mA
4
High Level Supply Current
I_CCH
0.7
3
mA
I_F = 10 mA
7, 8 5
Low Level Supply Current
I_CCL
1.2
3
mA
I_F = 0 mA
7, 8 5
Threshold Input Current
I_FLH
Low to High
7
mA
I_O = 0 mA, V_O > 5 V 9, 15
Threshold Input Voltage
High to Low
V_FHL
0.8
V
I_O = 0 mA, V_O > 5 V
Input Forward Voltage
V_F
1.2 1.5
1.8 V
I_F = 10 mA
16
Temperature Coefficient of
V_F/T_A
-1.6
Input Forward Voltage
mV/°C I_F = 10 mA
Input Reverse Breakdown Voltage BV_R
5
V
I_R = 10 μA
Input Capacitance
C_IN
60
pF
f = 1 MHz, V_F = 0 V
Table 6. Switching Specifications (AC)
Over recommended operating conditions unless otherwise specified.
Parameter
Symbol Min. Typ. Max. Units
Propagation Delay Time
to High Output Level
t_PLH
0.1 0.2
0.7 μs
Propagation Delay Time
to Low Output Level
Propagation Delay
Difference Between
Any Two Parts or Channels
Rise Time
Fall Time
Output High Level Common
Mode Transient Immunity
Output Low Level Common
Mode Transient Immunity
t_PHL
0.1 0.3
0.7 μs
PDD
-0.5
0.5 μs
t_R
50
t_F
50
|CM_H|
25
|CM_L|
25
ns
ns
kV/μs
kV/μs
Test Conditions
Fig. Note
R_g = 47, C_g = 3 nF, 10, 11, 6
f = 10 kHz,
12, 13,
Duty Cycle = 50%, 14, 17
I_F = 8 mA, V_CC = 30 V
6
7
T_A = 25°C,
V_CM = 1500 V
18
8
18
9
Notes:
1. Maximum pulse width = 50 s, maximum duty cycle = 0.5%.
2. Maximum pulse width = 10 s, maximum duty cycle = 0.2%. This value is intended to allow for component tolerances for designs with I_O peak
minimum = 0.4 A. See Application section for additional details on limiting I_OL peak.
3. In this test, V_OH is measured with a DC load current. When driving capacitive load V_OH will approach V_CC as I_OH approaches zero amps.
4. Maximum pulse width = 1 ms, maximum duty cycle = 20%.
5. The power supply current increases when operating frequency and Q_g of the driven IGBT increases.
6. This load condition approximates the gate load of a 1200 V/25 A IGBT.
7. PDD is the difference between t_PHL and t_PLH between any two parts or channels under the same test conditions.
8. Common mode transient immunity in the high state is the maximum tolerable |dV_CM/dt| of the common mode pulse V_CM to assure that the
output will remain in the high state (i.e. V_O > 6.0 V).
9. Common mode transient immunity in a low state is the maximum tolerable |dV_CM/dt| of the common mode pulse, V_CM, to assure that the output
will remain in a low state (i.e. V_O < 1.0 V).
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