ACFL-6211T Datasheet, PDF (6/13 Pages) AVAGO TECHNOLOGIES LIMITED – Automotive Wide Temperature Range

ACFL-6211T High Speed Mode Switching Specifications
Over recommended operating conditions: T_A = –40°C to +125°C, 4.5 V ≤ V_DD ≤ 5.5 V. All typical specifications are at
T_A=25°C, V_DD = 5V.
Parameter
Propagation Delay Time
to Logic Low Output
Propagation Delay Time
to Logic High Output
Pulse Width Distortion
Propagation Delay Skew
Output Rise Time
(10% – 90%)
Output Fall Time
(90% - 10%)
Common Mode Transient
Immunity at Logic High
Output
Common Mode Transient
Immunity at Logic High
Output
Symbol Min. Typ.
t_PHL
25
t_PLH
25
PWD
0
t_PSK
t_R
10
t_F
10
| CM_H | 15
25
| CM_L | 15
25
Max. Units Test Conditions
Fig Note
35
ns
V_in = 4.5V-5.5V,
5, 9, 1, 2,
R_in = 390W+/-5%,
11 3
35
ns
C_in = 100pF, C_L = 15pF
Output low threshold =
12
ns
0.8V
15
ns
Output high threshold =
ns
80% of Vdd
ns
kV/µs V_in = 0V R_in = 390W ± 5%,
4
C_in = 100pF, V_cm = 1000V,
T_A = 25°C
kV/µs V_in = 4.5V-5.5V ,
5
R_in = 390W ± 5%,
C_in = 100pF, V_cm = 1000V,
T_A = 25°C
ACFL-6212T Low Power Mode Switching Specifications
Over recommended operating conditions: T_A = –40°C to +125°C, 3.0 V ≤ V_DD ≤ 5.5 V All typical specifications at 25°C and
V_DD = 5V.
Parameter
Symbol Min. Typ. Max. Units Test Conditions
Fig Note
Propagation Delay Time
t_PHL
to Logic Low Output
60
100
ns
I_F = 4mA, C_L= 15pF
7, 12 1, 2,
3
Propagation Delay Time
t_PLH
to Logic High Output
35
100
ns
Pulse Width Distortion
PWD
25
50
ns
Propagation Delay Skew
t_PSK
60
ns
Output Rise Time (10% – 90%) t_R
10
ns
Output Fall Time (90% - 10%) t_F
10
ns
Common Mode Transient
Immunity at Logic High
Output
| CM_H | 25
40
kV/µs Using Avago LED Driving
4
Circuit, V_IN = 0V,
R₁ = 330W ± 5%,
R₂ = 330W ± 5%,
V_CM = 1000V, T_A = 25°C
Common Mode Transient
Immunity at Logic Low
Output
| CM_L | 25
40
kV/µs Using Avago LED Driving
5
Circuit, V_IN=4.5-5.5V,
R₁ = 330W ± 5%,
R₂ = 330W ± 5%,
V_CM = 1000V, T_A = 25°C
6