AFBR-5905Z Datasheet, PDF (4/13 Pages) AVAGO TECHNOLOGIES LIMITED – ATM Multimode Fiber Transceivers in 2 x 5 Package Style

RX TX
Mounting Studs/
Solder Posts
Top
View
RECEIVER SIGNAL GROUND
o1
10 _o
TRANSMITTER DATA IN BAR
RECEIVER POWER SUPPLY o 2
9o
TRANSMITTER DATA IN
SIGNAL DETECT o 3
8o
TRANSMITTER DISABLE (LASER BASED PRODUCTS ONLY)
RECEIVER DATA OUT BAR
o4
RECEIVER DATA OUT
o5
7o
TRANSMITTER SIGNAL GROUND
6o
TRANSMITTER POWER SUPPLY
Figure 3. Pin Out Diagram.
Pin Descriptions:
P_Pin_inD₁es_Rc_eri_cp_et_ii_vo_en_rs_S: _{ignal Ground VEE RX:}
No internal terminations are
provided. See recommended
based products connect this
pin to +3.3 V TTL logic high
P_Din_i1_reRe_cc_te_li_yve_cr_oSi_ngn_na_el_cG_tro_tu_hn_id_sV_pEE_inRX_t:_{o the circuit schematic.} Pin 6 Transmitter Pow_“e₁r S_”u_tp_oply_dV_iC_sC_aT_bX_l:_{e module. To}
Driereccetilvyecrongnreocutntdhispplainnteo. the receiver ground plane.
Provide +3.3 V dc vi_ea_nth_ae_br_leco_mm_om_due_ln_ede_cd_ontr_nan_es_cm_t i_tt_ote_Tr p_To_Lwer
P_Pin_in2 ₂Re_Rce_ei_cv_ee_ir_vP_eo_rw_Pe_or_wSu_ep_rp_Sly_uV_pC_pC_lyRX_V: _CC
Pin 5 Receiver Data O_su_ut_pR_pD_ly+_f:_{ilter circuit.loLgoiccatleowthe“0p”o.wer supply filter circuit}
No internal terminaas tcilonsesaasrpeossible to the VCC TX pin.
PsauR_PrsroepX_rccvp_ol:_oioldvysme_{iedfmia+lets3eep+}.r_n3_3ocdVs_{.ier3scdidbuV}cli_{retv.edtiLcoc}ao_{etctivhhvaieeetaerVrtteCphhcCoeeoRw}mpX_{eomprweinenr.dseudpcpirprr}e_olcycvue_ifidii_tvlt_eee_sdrr_c.p_{hcSioercwemue}e_{aitrtriecc.oPDmiinrem7cTetrlanyndcsmeodnitnteercStigthnPNpiaslironpGori9vionniuTdttnroeaedrtndVhns.EemaESltTiertXtate:eenrrsrmDmeaciittnoatmaeIrtnmigoTrenDonsu+dn:aedrdeplane.}
Psinu3pSpiglynafliDletteerctcSiDr:cuit. Locate
Pin 6 Transmitter Pow_Pie_nr₈S_Tu_rap_np_sl_my _{itter DisacbliercTDuIiSt: schematic.}
N^to^hr^em^pal^oo^wp^eti^rca^sl^uin^pp^pu^lyt le^fiv^le^tels^rto^cit^rh^ce^urⁱe^tceive^Vr^Cr^Ces^Tu^Xl^:t in a logic
“1^a”^so^cu^lt^op^su^et. L^ao^sw^po^op^st^sic^ibal^leinp^tout^tl^hev^ee^Vls^Ct^Co the^Pre^rc^oe^viv^ider^ere⁺s³u^.l³t in^V
dc^Npv_rooia_dinut^tceh_tre_{snaolnclyo.nFnoerc}^P_lta^iisnoen1_r.⁰_bO^T_ap^r_s^atenidosnm_par^ilottfdeer_uac^Dtuta_sr^tea_cof^Ion_nrn^{BleaacrsteTrtD}_hb^-_is^:aspeidn
a^Rfa^Xul^pt ⁱcⁿo^.ndition indicated by a logic “0”^ro^eu^ct^op^mut^m. T^ehⁿis^dS^ei^dg-^tranto^sm+ⁱ3^t.^t3^eV^r TTL logic^Nh^oighⁱⁿ“^t1^e”^rtⁿo^ad^l is^ta^eb^rmleⁱm^nao^tdⁱu^olⁿe^s. T^ao^re^enable
naS_{PPNt“iniangh1i}l_onun4”eD_rpa3Rmoe_rlse-Sett_ubcaer_iecteagc_lipevrant._oeiumavo_rptlDeu_.ctDart_iiepr_tccartu_aeueOt_lcisuttc_i,utna_SsBlnu_pDtacru:b_ihRnte_Dal-aus_e: sS_vlei_eogdlgnsita_co_{tloDderitveec}^pLct_{tahioiornPewccpEauVu}^eC_tirtCL_etoC^si_atnr^uhTspL^pe_oXu_cpstpls^lpoo^yo_oisn_{wnfefi.elatrse}m_PNcsriipournoc^cop₉diuⁱ_nsrpTuit_st^c_rl_leaies^uy_rbncnⁱc_slhftmoa_ei.elln_{imttttnteeoeaerrrmtciD}tci_a.nttoa_a^pc_MTtTIiin^rhTo_ro^o_TecL_un^v_Dunslmi+o_tia^d_itg_:nroeeigsc_udcpnSl^.hor_tto^Sw_euiv^emn_d“i^e_sdg0_a/e”tr._sSdietco.^cu._lSd^od_ee^ms_er ^m_raPeroc^ee_soⁿ_tms^de_m^d_ended
N_Lo_oi_wnte_orn_pa_til_cte_ar_lm_inin_pa_utio_t n_les _va_ere_lspr_to_ovi_td_he_ed.
c_rir_ec_cu_eit_is_vc_eh_re_rm_ea_st_uic_l._{t in a fault}
Pcino5nRdeicteiiovenr DinatdaiOcuattReDd+b: y a logic
N^“o^0”int^oe^urn^tpa^ul t^te^.rminations are provided.
c_Tirc_hu_isit s_Sc_ih_ge_nm_alat_Dic_e. _{tect output can}
SSee^PV_DtPee_rEⁱⁱ_iⁿⁿ_arr_Eree_nT78ecc_sXcoo^TT_mt:mm^rr_l^aa_yimmⁿⁿ_tt^ss_cee_e^mm_onn_rⁱⁱ_ndd^tt_g^tt_nee^ee_rdd_e^rr_oc^SD_utⁱⁱ_n^gs_{tdPNcManhiibaornoiplc}^l_sue1iu^G_lnn0apTi^r_tttnTD^o_eiirsnnI^u_eracSnⁿ_gn.h:ta^d_{seSomltmtuiettadhtremtseri/cSDi.noaatl}pmcrtt_datoheiir_eoIreceno_{rcnccovBPhcushmiaoiaaidarrstsmrnT}e_{tcessDbdiueipc-osi:nar}fta_oodglrb_vrread_{iooddtt.autreartadnIhdcn.tdhaS}s.bit_emcseeetehi_rcnveeoectnorhtn_{mooelmtechsteeeniddned}
be used to drive a PECL input _{No internal conneTchtieomn.ounting studs are provided for transceiver mechani-}
on an upstream circuit, such
Optional feature fcoarl laatstaecrhment to the circuit board. It is recommended
as Signal Detect input or Loss _{based products onthlya.t Fthoerhloalseesrin the circuit board be connected to chassis}
of Signal-bar.
ground.
Pin 4 Receiver Data Out Bar RD-:
4