HCPL-3120-500E Datasheet, PDF (23/25 Pages) AVAGO TECHNOLOGIES LIMITED – 2.5 Amp Output Current IGBT Gate Drive Optocoupler

Under Voltage Lockout Feature. (Discussion applies to
HCPL-3120, HCPL-J312, and HCNW3120)
The HCPL-3120 contains an under voltage lockout (UVLO)
feature that is designed to protect the IGBT under fault
conditions which cause the HCPL-3120 supply voltage
(equivalent to the fully-charged IGBT gate voltage) to
drop below a level necessary to keep the IGBT in a low re-
sistance state. When the HCPL-3120 output is in the high
state and the supply voltage drops below the ­HCPL-
3120 V_UVLO– threshold (9.5 < V_UVLO– < 12.0) the opto­
coupler output will go into the low state with a typical
delay, UVLO Turn Off Delay, of 0.6 µs.
When the HCPL-3120 output is in the low state and
the supply voltage rises above the HCPL-3120 V_UVLO+
threshold (11.0 < V_UVLO+ < 13.5) the optocoupler output
will go into the high state (assumes LED is “ON”) with a
typical delay, UVLO Turn On Delay of 0.8 µs.
I_LED1
V_OUT1
V_OUT2
Q1 ON
Q2 OFF
Q1 OFF
Q2 ON
I_LED2
t_{PHL MIN}
t_{PHL MAX}
(t_PHL-t_PLH) _MAX
t_PLH
MIN
t_{PLH MAX}
PDD* MAX
MAXIMUM DEAD TIME
(DUE TO OPTOCOUPLER)
= (t_{PHL MAX} - t_{PHL MIN}) + (t_{PLH MAX} - t_{PLH MIN})
= (t_{PHL MAX} - t_{PLH MIN}) – (t_{PHL MIN} - t_{PLH MAX})
= PDD* MAX – PDD* MIN
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: FOR DEAD TIME AND PDD CALCULATIONS ALL PROPAGATION
DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
IPM Dead Time and Propagation Delay Specifications.
(Discussion applies to HCPL-3120, HCPL-J312, and
HCNW3120)
The HCPL-3120 includes a Propagation Delay Difference
(PDD) specification intended to help designers minimize
“dead time” in their power inverter designs. Dead time
is the time period during which both the high and low
side power transistors (Q1 and Q2 in Figure 25) are off.
Any overlap in Q1 and Q2 conduction will result in large
currents flowing through the power devices between
the high and low voltage motor rails.
I_LED1
V_OUT1
V_OUT2
Q1 ON
Q2 OFF
Q1 OFF
Q2 ON
I_LED2
t_{PHL MAX}
t_{PLH MIN}
PDD* MAX = (t_PHL- t_PLH)_MAX = t_{PHL MAX} - t_{PLH MIN}
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: FOR PDD CALCULATIONS THE PROPAGATION DELAYS
ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
Figure 35. Minimum LED skew for zero dead time.
HCPL-3120 fig 35
Figure 36. Waveforms for d_He_Ca_Pd_L-t₃i₁m₂₀e._{fig 36}
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