HCPL-3120-560E Datasheet, PDF (22/24 Pages) AVAGO TECHNOLOGIES LIMITED – 2.5 Amp Output Current IGBT Gate Drive Optocoupler

CMR with the LED On (CMR_H).
A high CMR LED drive circuit must keep the LED on during
common mode transients. This is achieved by overdriv-
ing the LED current beyond the input threshold so that
it is not pulled below the threshold during a transient.
A minimum LED cur­rent of 10 mA provides adequate
margin over the maximum I_FLH of 5 mA to achieve 25 kV/
µs CMR.
CMR with the LED Off (CMR_L).
A high CMR LED drive circuit must keep the LED off
(V_F ≤ V_F(OFF)) during common mode transients. For
example, during a -dV_cm/dt transient in Figure 31, the
current flowing through C_LEDP also flows through the
R_SAT and V_SAT of the logic gate. As long as the low state
voltage developed across the logic gate is less than
V_F(OFF), the LED will remain off and no common mode
failure will occur.
The open collector drive circuit, shown in Figure 32,
cannot keep the LED off during a +dVcm/dt transient,
since all the current flowing through C_LEDN must be
supplied by the LED, and it is not recommended for
applica-tions requiring ultra high CMR_L performance.
Figure 33 is an alternative drive circuit which, like the rec-
ommended applica-tion circuit (Figure 25), does achieve
ultra high CMR performance by shunting the LED in the
off state.
+5 V
+
V_SAT
–
1
C_LEDP
2
I_LEDP
3
C_LEDN
4
SHIELD
8
0.1
7
µF
+
–
V_CC = 18 V
6
•••
Rg
5
•••
* THE ARROWS INDICATE THE DIRECTION
OF CURRENT FLOW DURING –dV_CM/dt.
+–
V_CM
Figure 31. Equivalent circuit for figure 25 during common mode transient.
1
8
+5 V
C_LEDP
2
7
3
6
Q1
C_LEDN
I_LEDN
4
5
SHIELD
Figure 32. Not recommended open collector drive circuit.
HCPL-3120 fig 31
1
8
+5 V
C_LEDP
2
7
3
6
C_LEDN
4
5
SHIELD
Figure 33. Recommended LED drive circuit for ultra-high CMR.
HCPL-3120 fig 33
14
HCPL-3120 fig 32
12
(12.3, 10.8)
10
(10.7, 9.2)
8
6
4
2
0
(10.7, 0.1)
(12.3, 0.1)
0
5
10
15
20
(V_CC - V_EE ) – SUPPLY VOLTAGE – V
Figure 34. Under voltage lock out.
HCPL-3120 fig 34
22