MGA-43228 Datasheet, PDF (14/19 Pages) AVAGO TECHNOLOGIES LIMITED – 2.3–2.5 GHz 29dBm High Linearity Wireless Data Power Amplifi er

Demonstration Board Top View
Vdd1 Vdd2 Vdd3
+5V
+5V
+5V
C25 ^RFIN
MGA-43228
(B)
C9
C5
C4 _L1
C8
C10
C11
C12
C26
C27a ^RFOUT
C28
MGA-43228
C13
C27b
C14
R1
C15
C16
C17
C18
CC2109
CC2212
R3
R2
R4
C7
RO4350
DK 3.48
H 10mil
W 0.57mm
G 0.59mm
DEC'09
Vbyp
Vc
0V (normal gain) +2.1V
+5V (low gain)
Vbias Vdet
+5V (Output)
Bill of materials
Component
C9
Value
22uF
Part #
GRM31CR61C226ME15
C1, C5,
C11, C22
C7, C13,
C25, C28
C4
0.1uF
7.5pF
8.2pF
GRM155R71C104KA88
GJM1555C1H7R5DB01
GJM1555C1H8R2DB01
C8
2.4pF GJM1555C1H2R4CB01
C12
2.2pF GJM1555C1H2R2CB01
C26
0.4pF GJM1555C1HR40BB01
C27a
1.8pF GJM1555C1H1R8CB01
C27b
2.0pF GJM1555C1H2R0CB01
C23
22nF GRM155R71E223KA61
L1
1.0nH 0402HP-1N0XJLW
R1
0
RK73Z1ETTD
R2
1200 RK73B1ETTD122J
R3
300 RK73B1ETTD301J
R4
1200 RK73B1ETTD122J
Note:
For performance optimization, control voltage for individual stages
can be adjusted by varying R2, R3 and R4 resistor values.
Pins pointing out of the page
(Unit is on top)
Vdd1 Vdd2 Vdd3
+5V
+5V
+5V
123456
12 11 10 9 8 7
13 14 15 16 17 18
24 23 22 21 20 19
C25 ^RFIN
MGA-43228
(B)
C9
C5
C4 _L1
C8
C10
C11
C12
C26
C27a ^RFOUT
C28
MGA-43228
C13
C27b
C14
R1
C15
C16
C17
C18
CC2109
CC2212
R3
R2
R4
C7
RO4350
DK 3.48
H 10mil
W 0.57mm
G 0.59mm
DEC'09
Vbyp
Vc
0V (normal gain) +2.1V
+5V (low gain)
Vbias Vdet
+5V (Output)
Figure 35. Demonstration board application circuit for MGA-43228 module
Application board pin header
assignments
Pin 1 : Vdd3 (Sense)
Pin 2 : Vdd3 (Force)
Pin 3 : Vdd2 (Sense)
Pin 4 : Vdd2 (Force)
Pin 5 : Vdd1 (Sense)
Pin 6 : Vdd1 (Force)
Pin 13 : Vbyp
Pin 14 : Vc1 (Not used)
Pin 15 : Vc2
Pin 16 : Vc3 (Not used)
Pin 17 : Vbias
Pin 18 : Vdet
Other pins are grounded
14