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ACPL-798J Datasheet, PDF (11/17 Pages) AVAGO TECHNOLOGIES LIMITED – Optically Isolated Sigma-Delta Modulator with LVDS Interface
Product Overview
Description
The ACPL-798J isolated sigma-delta (∑−∆) modulator
converts an analog input signal into a high-speed (up
to 25MHz) single-bit data stream by means of a sigma-
delta over-sampling modulator. The time average of the
modulator data is directly proportional to the input signal
voltage. The modulator uses external clock ranges from 5
MHz to 25 MHz that is coupled across the isolation barrier.
This arrangement allows synchronous operation of data
acquisition to any digital controller, and adjustable clock
for speed requirements of the application. The modulator
data are encoded and transmitted across the isolation
boundary where they are recovered and decoded into
high-speed data stream of digital ones and zeros. The
original signal information is represented by the density
of ones in the data output.
The other main function of the modulator (optocoupler)
is to provide galvanic isolation between the analog signal
input and the digital data output. It provides high noise
margins and excellent immunity against isolation-mode
transients that allows direct measurement of low-level
signals in highly noisy environments, for example mea-
surement of motor phase currents in power inverters.
With 0.5 mm minimum DTI, the ACPL-798J provides
reliable double protection and high working insulation
voltage, which is suitable for fail-safe designs. This out-
standing isolation performance is superior to alterna-
tives including devices based on capacitive- or magnet-
ic-coupling with DTI in micro-meter range. Offered in an
SO-16 package, the isolated ADC delivers the reliability,
compact size, superior isolation and over-temperature
performance motor drive designers need to accurately
measure current at much lower price compared to tradi-
tional current transducers.
Analog Input
The differential analog inputs of the ACPL-798J are im-
plemented with a fully-differential, switched-capacitor
circuit. The ACPL-798J accepts signal of ±200 mV (full scale
±320 mV), which is ideal for direct connection to shunt
based current sensing or other low-level signal sources
applications such as motor phase current measurement.
An internal voltage reference determines the full-scale
analog input range of the modulator (±320 mV); an input
range of ±200 mV is recommended to achieve optimal
performance. Users are able to use higher input range,
for example ±250 mV, as long as within full-scale range,
for purpose of over-current or overload detection. Figure
22 shows the simplified equivalent circuit of the analog
input.
VIN+
fSWITCH
= MCLKIN
200Ω (TYP)
1.5 pF
3 pF (TYP)
fSWITCH
= MCLKIN
VIN–
COMMON MODE
ANALOG VOLTAGE
GROUND
1.5 pF
200Ω (TYP)
3 pF (TYP)
Figure 22. Analog input equivalent circuit.
In the typical application circuit (Figure 25.), the ACPL-798J
is connected in a single-ended input mode. Given the
fully differential input structure, a differential input con-
nection method (balanced input mode as shown in Figure
23) is recommended to achieve better performance. The
input currents created by the switching actions on both of
the pins are balanced on the filter resistors and cancelled
out each other. Any noise induced on one pin will be
coupled to the other pin by the capacitor C and creates
only common mode noise which is rejected by the device.
The resistors and the capacitor also forms an anti-aliasing
filter for the sigma-delta modulator. Typical value for RA
and RB is 22 W and 10 nF for C.
Ra
+Analog Input
Rb
–Analog Input
5V
VDD1
VIN+
C
ACPL-798J
VIN–
GND1
Figure 23. Simplified differential input connection diagram.
Latch-up Consideration
Latch-up risk of CMOS devices needs careful consider-
ation, especially in applications with direct connection to
signal source that is subject to frequent transient noise.
The well designed analog input structure of the ACPL-798J
is resilient to transients, which are often encountered
in highly noisy application environments such as motor
drive and other power inverter systems. Other situations
could cause transient voltages to the inputs include short
circuit and overload conditions. The ACPL-798J is tested to
be able to reject DC voltage of –2 V and 2-second transient
voltage of –6 V presented to the analog inputs without
any latch-up or damage to the device.
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