MGA-71543 Datasheet, PDF (1/24 Pages) AVAGO TECHNOLOGIES LIMITED – Low Noise Amplifier

MGA-71543
Low Noise Amplifier with Mitigated Bypass Switch
Data Sheet
Description
Avago’s MGA-71543 is an economical, easy-to-use GaAs
MMIC Low Noise Amplifier (LNA), which is designed for
adaptive CDMA and W-CDMA receiver systems. The MGA-
71543 is part of the Avago Technologies complete CD-
MAdvantage RF chipset.
The MGA-71543 features a minimum noise figure of 0.8 dB
and 16 dB available gain from a single stage, feedback FET
amplifier. The input and output are partially matched, and
only a simple series/shunt inductor match is required to
achieve low noise figure and VSWR into 50Ω.
When set into the bypass mode, both input and output
are internally matched through a mitigative circuit. This
circuit draws no current, yet duplicates the in and out im-
pedance of the LNA. This allows the system user to have
minimum mismatch change from LNA to bypass mode,
which is very important when the MGA-71543 is used be-
tween duplexers and/or filters.
The MGA-71543 offers an integrated solution of LNA with
adjustable IIP3. The IIP3 can be fixed to a desired current
level for the receiver’s linearity requirements.
The LNA has a bypass switch function, which provides low
insertion loss at zero current. The bypass mode also boosts
dynamic range when high level signal is being received.
The MGA-71543 is designed for CDMA and W-CDMA re-
ceiver systems. The IP3, Gain, and mitigative network are
tailored to these applications where filters are used. Many
CDMA systems operate 20% LNA mode, 80% bypass. With
the bypass current draw of zero and LNA of 10 mA, the
MGA-71543 allows an average 2 mA current.
The MGA-71543 is a GaAs MMIC, processed on Avago’s
cost effective PHEMT (Pseudomorphic High Electron Mo-
bility Transistor Technology). It is housed in the SOT343
(SC70 4-lead) package.
Features
 Lead-free Option Available
 Operating frequency: 0.1 GHz ~ 6.0 GHz
 Noise figure: 0.8 dB (NFmin)
 Gain: 16 dB
 Average Idd = 2mA in CDMA handset
 Bypass switch on chip Loss = -5.6 dB (Id < 5 μA) IIP3 =
+35 dBm
 Adjustable input IP3: 0 to +9 dBm
 2.7 V to 4.2V operation
Applications
 CDMA (IS-95, J-STD-008) Receiver LNA
 Transmit Driver Amp
 W-CDMA Receiver LNA
 TDMA (IS-136) handsets
Attention:
Observe precautions for handling
electrostatic sensitive devices.
ESD Machine Model (Class A)
ESD Human Body Model (Class 0)
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control.
Surface Mount Package SOT-343 /4-lead SC70
Pin Connections and Package Marking
3
INPUT
& Vref
4
RF Gnd
&V s
1
RF Gnd
& Vs
2
OUTPUT
& Vd