HCPL-4506-500E Datasheet, PDF (1/21 Pages) AVAGO TECHNOLOGIES LIMITED – Intelligent Power Module and Gate Drive Interface Optocouplers

HCPL-4506/J456/0466, HCNW4506
Intelligent Power Module and Gate Drive Interface Optocouplers
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
The HCPL-4506 and HCPL-0466 contain a GaAsP LED while
the HCPL-J456 and the HCNW4506 con­tain an AlGaAs LED.
The LED is optically coupled to an inte­grated high gain
photo detector. Minimized propagation delay difference
between devices makes these optocouplers excellent so-
lutions for improving inverter efficiency through reduced
switching dead time.
An on chip 20 kΩ output pull-up resistor can be enabled by
shorting output pins 6 and 7, thus eliminating the need for
an external pull-up resistor in common IPM applications.
Specifications and performance plots are given for typical
IPM applications.
Functional Diagram
NC 1
ANODE 2
20 kΩ
8 V_CC
7 V_L
CATHODE 3
6 V_O
NC 4
SHIELD
5 GND
Features
• Performance specified for bommon IPM applications
over industrial temperature range: -40°C to 100°C
• Fast maximum propagation delays
t_PHL = 480 ns
t_PLH = 550 ns
• Minimized Pulse Width Distortion
PWD = 450 ns
• 15 kV/µs minimum common mode transient immu-
nity
at V_CM = 1500 V
• CTR > 44% at I_F = 10 mA
• Safety approval:
UL Recognized
-3750 V rms / 1 min. for HCPL-4506/0466/J456
-5000 V rms / 1 min. for HCPL-4506 Option 020
and HCNW4506
  CSA Approved
IEC/EN/DIN EN 60747-5-2 Approved
-V_IORM = 560 Vpeak for HCPL-0466 Option 060
-V_IORM = 630 Vpeak for HCPL-4506 Option 060
-V_IORM = 891 Vpeak for HCPL-J456
-V_IORM = 1414 Vpeak for HCNW4506
Truth Table
LED
V_O
H^OC^NPL-4506 Functional Dia^Lgram
OFF
H
The connection of a 0.1 µF bypass capacitor
between pins 5 and 8 is recommended.
Applications
• IPM isolation
• Isolated IGBT/MOSFET gate drive
• AC and brushless DC motor drives
• Industrial inverters
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.