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ASSR-4118 Datasheet, PDF (1/11 Pages) AVAGO TECHNOLOGIES LIMITED – Form A, Solid State Relay (Photo MOSFET) (400V/0.10A/35) | |||
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ASSR-4118 , ASSR-4119 and ASSR-4128
Form A, Solid State Relay (Photo MOSFET)
(400V/0.10A/35ï)
Data Sheet
Description
The ASSR-41XX Series consists of an AlGaAs infrared
light-emitting diode (LED) input stage optically coupled
to a high-voltage output detector circuit. The detector
consists of a high-speed photovoltaic diode array and
driver circuitry to switch on/off two discrete high volt-
age MOSFETs. The relay turns on (contact closes) with a
minimum input current of 3mA through the input LED.
The relay turns off (contact opens) with an input voltage
of 0.8V or less.
The single channel configurations, ASSR-4118 and ASSR-
4119, are equivalent to 1 Form A Electromechanical Re-
lays (EMR), and the dual channel configuration, ASSR-
4128, is equivalent to 2 Form A EMR. They are available
in 4-pin SO, 6-pin DIP, 8-pin DIP and Gull Wing Surface
Mount for DIP packages. ASSR-4119 enables AC/DC and
DC-only output connections. For DC-only connection,
the output current, Io, increases to 0.2A and the on-re-
sistance, R(ON) reduces to 10ï.
Applications
ï· Telecommunication Switching
ï· Data Communications
ï· Industrial Controls
ï· Medical
ï· Security
ï· EMR / Reed Relay Replacement
Features
ï· Compact Solid-State Bi-directional Signal Switch
ï· Single and Dual Channel Normally-off Single-Pole-
Single-Throw (SPST) Relay
ï· 400V Output Withstand Voltage
ï· 0.1A or 0.2A Current Rating
(See Schematic for ASSR-4119 Connection A and B)
ï· Low Input Current: CMOS Compatibility
ï· Low On-Resistance: 8ï Typical for DC-only,
25ïï Typical for AC/DC
ï· High Input-to-Output Insulation Voltage
(Safety and Regulatory Approvals Pending)
- 3750 Vrms for 1 min per UL1577
- CSA Component Acceptance
Functional Diagram
Opto-isolation
1
2
Single Channel, SPST Relay,
1 Form A in 4-Pin SO Package
4 Truth Table
LED Output
Off Open
On Close
3
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
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