AEIC-7272-S16 Datasheet, PDF(1/3 Page) AVAGO TECHNOLOGIES LIMITED – Quad Diff erential Line Driver Separate Logic Bias and Driver Bias With Tri-State Outputs

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AEIC-7272-S16 Datasheet, PDF (1/3 Pages) AVAGO TECHNOLOGIES LIMITED – Quad Diff erential Line Driver Separate Logic Bias and Driver Bias With Tri-State Outputs

AEIC-7272-S16

Quad Differential Line Driver

Separate Logic Bias and Driver Bias

With Tri-State Outputs

Data Sheet

Description

These line drivers are pin compatible with 26LS31 in ap-

plications where pin 4 = 5V and pin 12 = GND. Internal

clamp diodes allow trouble-free operation when driving

cable lengths exceeding 100m. Split supplies are provided

to minimize standby power dissipation in high voltage ap-

plications. The logic should be powered from a regulated

5V supply at the VccBias pin. The output stages may then

be powered by a separate supply at VccDrivers, up to 30V.

Output voltage swings of 0.3V to VCC-1.9V are typical. The

outputs are protected against shorts to ground, shorts to

Vcc and to other outputs, by a two-fold scheme of current

limiting and thermal shutdown. This assures highly reliable

operation in harsh environments.

This part is available in 16L SOIC (Pb-free) package.

Applications

ï·ï Encoders

ï·ï Industrial controls

Features

ï·ï Supply (Bias) Voltage Range 3.5 V to 30 V

ï·ï Operation to 800 KHz

ï·ï CMOS and TTL Compatible Inputs

ï·ï Separate logic bias and driver supply pins

ï·ï Optional single supply operation for moderate power

applications

ï·ï High Impedance Buffered Inputs with hysteresis

ï·ï Tri-State outputs

ï·ï 80 mA peak SINK/SOURCE current

Pin Assignment

AIN 1

A+ 2

A- 3

16 Vcc Drivers

15 DIN

14 D+

Vcc Bias 4 VREG

13 D-

B- 5

12 EN-

B+ 6

11 C-

BIN 7

10 C+

GND 8

9 CIN

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