ACPL-W60L-500E Datasheet, PDF (1/12 Pages) AVAGO TECHNOLOGIES LIMITED – High Speed LVTTL Compatible 3.3 Volt/5 Volt Optocouplers

ACPL-W60L and ACPL-K63L
High Speed LVTTL Compatible 3.3 Volt/5 Volt Optocouplers
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
The ACPL-W60L/K63L are optically coupled gates that
combine a GaAsP light emitting diode and an integrated
high gain photo detector. The output of the detector IC is
an open collector Schottky-clamped transistor. The internal
shield provides a guaranteed common mode transient
immunity specification of 15 kV/µs at 3.3 V.
This unique design provides maximum AC and DC circuit
isolation while achieving LVTTL/LVCMOS compatibility.
The optocoupler AC and DC operational parameters are
guaranteed from –40 °C to +85 °C allowing trouble-free
system performance.
Functional Diagram
ACPL-W60L
ANODE 1
NC 2
CATHODE ₃
SHIELD
6 VCC
ANODE ₁ 1
CATHODE ₁ 2
5 V_O
CATHODE ₂ 3
4 GND
ANODE ₂ 4
ACPL-K63L
SHIELD
8 VCC
7 VO1
6 VO2
5 GND
TRUTH TABLE
(POSITIVE LOGIC)
LED OUTPUT
ON
L
OFF
H
A 0.1 µF bypass capacitor must be connected between pins 4 and 6 for
ACPL-W60L, and pins 5 and 8 for ACPL-K63L.
Features
• Dual Voltage Operation (3.3V/5V)
• Package clearance/creepage at 8 mm
• Low power consumption
• 15 kV/µs minimum Common Mode Rejection (CMR)
at V_CM = 1000V
• High speed: 15 MBd typical
• LVTTL/LVCMOS compatible
• Low input current capability: 5 mA
• Guaranteed AC and DC performance over tempera-
ture: –40 °C to +85 °C
• Available in 6-pin stretched SO-6 and 8 pin stretched
SO-8
• Safety approvals: UL, CSA, IEC/EN/DIN EN 60747-5-5
Applications
• Isolated line receiver
• Computer-peripheral interfaces
• Microprocessor system interfaces
• Digital isolation for A/D, D/A conversion
• Switching power supply
• Instrument input/output isolation
• Ground loop elimination
• Pulse transformer replacement
• Fieldbus
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.