ACPL-M483 Datasheet, PDF (1/12 Pages) AVAGO TECHNOLOGIES LIMITED – Short Maximum Propagation Delays

ACPL-M483/P483/W483
Inverted Logic High CMR Intelligent Power Module
and Gate Drive Interface Optocoupler
Data Sheet
Description
The ACPL-M483/P483/W483 fast speed optocoupler
contains a AlGaAs LED and photo detector with built-in
Schmitt trigger to provide logic-compatible waveforms,
eliminating the need for additional wave shaping. The
totem pole output eliminates the need for a pull up
resistor and allows for direct drive of Intelligent Power
Module or as a gate driver. Minimized propagation delay
difference between devices makes these optocouplers
excellent solutions for improving inverter efficiency
through reduced switching dead time.
Applications
 IPM Interface Isolation
 Isolated IGBT/MOSFET Gate Drive
 AC and Brushless DC Motor Drives
 Industrial Inverters
 General Digital Isolation
Functional Diagram
ACPL-M483
Anode 1
Cathode 3
SHIELD
6 VCC
5 VO
4 Ground
Note: A 0.1 F bypass
capacitor must be con-
nected between pins Vcc
and Ground.
ACPL-P483 & ACPL-W483
Anode 1
N.C. 2
Cathode 3
SHIELD
6 V_CC
5 VO
4 Ground
Truth Table
(Negative Logic)
LED
V_O
ON
LOW
OFF
HIGH
Truth Table Guaranteed:
Vcc from 4.5 V to 30 V
Features
 Inverted output type (totem pole output)
 Truth Table Guaranteed: Vcc from 4.5 V to 30 V
 Performance Specified for Common IPM Applications
Over Industrial Temperature Range.
 Short Maximum Propagation Delays
 Minimized Pulse Width Distortion (PWD)
 Very High Common Mode Rejection (CMR)
 Hysteresis
 Available in SO-5 (ACPL-M483) and Stretched SO-6
package (ACPCL-P483/W483).
 Package Clearance/Creepage at 8 mm (ACPL-W483)
 Safety Approval:
– UL Recognized with 5000 V_rms (ACPL-W483) for 1
minute per UL1577.
– CSA Approved.
– IEC/EN/DIN EN 60747-5-5 Approved with V_IORM =
567 V_peak for ACPL-M483 and V_IORM = 891 V_peak for
ACPL-P483 and V_IORM = 1140 V_peak for ACPL-W483,
under option 060.
Specifications
 Wide operating temperature range: -40°C to 105°C.
 Maximum propagation delay t_PHL/t_PLH = 120/120 ns
 Maximum Pulse Width Distortion (PWD) = 50 ns.
 Propagation Delay Difference Min/Max = –100/100 ns
 Wide Operating V_CC Range: 4.5 to 30 Volts
 30 kV/s minimum common mode rejection (CMR) at
V_CM = 1000 V.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.