SMJ27C512 Datasheet, PDF (6/11 Pages) Austin Semiconductor – UV Erasable Programmable Read-Only Memory

Austin Semiconductor, Inc.
UVEPROM
SMJ27C512
CAPACITANCE OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND
OPERATING CASE TEMPERATURE, f = 1MHz*
PARAMETER
TEST CONDITIONS TYP** UNIT
C_I Input capacitance
V_I = 0V
6
pF
C_O Output capacitance
V_O = 0V
10
pF
C_G/V_PP G\ /V_PP input capacitance
G\ /V_PP = 0V
20
pF
* Capacitance measurements are made on sample basis only.
** All typical values are at T_C = 25°C and nominal voltages.
SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY
VOLTAGE AND OPERATING CASE TEMPERATURE
PARAMETER
TEST
-15
-20
-25
CONDITIONS^1,2 MIN MAX MIN MAX MIN MAX ^UNIT
t_a(A) Access time from address
150
200
250 ns
t_a(E) Access time from E\
150
200
250 ns
t_en(G)
t_dis
t_v(A)
Output enable time from G\ /V_PP
Output disable time from G\ /V_PP or E\,
whichever occurs first³
Output data valid time after change of
address, E\, or G\, whichever occurs first³
See Figure 2
70
75
100 ns
0 50 0 60 0 60 ns
0
0
0
ns
NOTES:
1. Timing measurements are made at 2V for logic high and 0.8V for logic low. (see Figure 2)
2. Common test conditions apply for t_dis except during programming.
3. Value calculated from 0.5V delta to measured output level. This parameter is only sampled and not 100% tested.
RECOMMENDED TIMING REQUIREMENTS FOR PROGRAMMING: V = 6.5V and
CC
G\ /V_PP = 13V (SNAP! Pulse), T_C = 25°C (see Figure 2)
MIN
NOM
MAX UNIT
t_{dis(E) Output disable time from E\}
0
130
ns
t_h(A) Hold Time, address
0
µs
t_h(D) Hold time, address
2
µs
t_h(VPP) Hold time, G\ /V_PP
2
µs
t_w(IPGM) Pulse duration, initial program
95
100
105
µs
t_rec(PG) Recovery time, G\ /V_PP
2
µs
t_su(A) Setup Time, Address
2
µs
t_su(D) Setup Time, Data
2
µs
t_su(Vpp) Setup Time, G\ /V_PP
2
µs
t_su(Vcc) Setup Time, V_CC
2
µs
t_v(ELD) Data valid from E\ low
1
µs
t_r(PG) G\ /V_PP rise time
50
ns
SMJ27512
Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
6