AS28F128J3M Datasheet, PDF (1/8 Pages) Austin Semiconductor – Plastic Encapsulated Microcircuit 128Mb, x8 and x16 Q-FLASH Memory Even Sectored, Single Bit per Cell Architecture

Austin Semiconductor, Inc.
PEM
AS28F128J3M
Q-Flash
Plastic Encapsulated Microcircuit
128Mb, x8 and x16 Q-FLASH Memory
Even Sectored, Single Bit per Cell Architecture
Features
• 100% Pin and Function compatible to Intel’s MLC Family
• NOR Cell Architecture
• 2.7V to 3.6V VCC
• 2.7V to 3.6V or 5V VPEN (Programming Voltage)
• Asynchronous Page Mode Reads
• Manufacturer’s ID Code:
! MT28F128J3MRG
Micron
0x2Ch
• Industry Standard Pin-Out
• Fully compatible TTL Input and Outputs
• Common Flash Interface [CFI]
• Scalable Command Set
• Automatic WRITE and ERASE Algorithms
• 5.6us per Byte effective programming time
• 128 bit protection register
! 64-bit unique device identifier
! 64-bit user programmable OTP cells
• Enhanced data protection feature with use of VPEN=VSS
• Security OTP block feature
• 100,000 ERASE cycles per BLOCK
• Automatic Suspend Options:
! Block ERASE SUSPEND-to-READ
! Block ERASE SUSPEND-to-PROGRAM
! PROGRAM SUSPEND-to-READ
• Available Operating Ranges:
! Enhanced
[-ET] -40^oC to +105^oC
! Mil-Temperature [-XT] -55^oC to +125^oC
For in-depth functional product detail and Timing Diagrams,
please reference Micron’s full product Datasheet:
MT28F640J3 Rev. L Dated 04/16/04
General Description
PIN ASSIGNMENT
123 456 78
A
A1 A6
A8 VPEN A13 VCC A18 A22
B
A2 VSS A9 CE0 A14 A25 A19 CE1
C
A3
A7 A10 A12 A15 DNU A20 A21
D
A4 A5 A11 RP\ DNU DNU A16 A17
E
DQ8 DQ1 DQ9 DQ3 DQ4 DNU DQ15 STS
F
BYTE\ DQ0 DQ10 DQ11 DQ12 DNU DNU OE\
G
A23
A0 DQ2 VCCQ DQ5 DQ6 DQ14 WE\
H
CE2 DNU VCC VSS DQ13 VSS DQ7 A24
64-Ball FBGA
A22
1
CE1
2
A21
3
A20
4
A19
5
A18
6
A17
7
A16
8
VCC
9
A15
10
A14
11
A13
12
A12
13
CE0
14
VPEN
15
RP\
16
A11
17
A10
18
A9
19
A8
20
VSS
21
A7
22
A6
23
A5
24
A4
25
A3
26
A2
27
A1
28
56
NC
55
WE\
54
OE\
53
STS
52
DQ15
51
DQ7
50
DQ14
49
DQ6
48
VSS
47
DQ13
46
DQ5
45
DQ12
44
DQ4
43
VCCQ
42
VSS
41
DQ11
40
DQ3
39
DQ10
38
DQ2
37
VCC
36
DQ9
35
DQ1
34
DQ8
33
DQ0
32
A0
31
BYTE\
30
A23
29
CE2
ASI’s, AS28F128J3M Enhanced or Mil-Temp variant of Micron’s ^{This device features in-system block locking. They also have a}
Q-Flash family of devices, is a nonvolatile, electrically block- ^{Common FLASH Interface [CFI] that permits software algorithms}
erasable (FLASH), programmable memory device manufactured ^{to be used for entire families of devices. The software is device-}
using Micron’s 0.15um process technology. This device ^{independent, JEDEC ID-independent with forward and backward}
containing 134,217,728 bits organized as either 16,777,218 (x8) ^{compatibility.}
or 8,388,608 bytes (x16). The device is uniformly sectored with
one hundred and twenty eight 128KB ERASE blocks.
AS28F128J3MRG
Revision 5.0 11/23/04
Austin Semiconductor, Inc. reserves the right to change products or modify product specifications with appropriate notification
For Additional Products and Information visit out Web site at www.austinsemiconductor.com
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