SD60C32 Datasheet, PDF (8/13 Pages) AUK corp – CMOS SINGLE-COMPONENT 8-BIT MICROCOMPUTER

SD60C32/P SD60C52/P
Electrical Characteristics (AC)
(T_a = 0 ~ 70 or -40 ~ 85 , V_CC = 5V ± 20%, V_SS=0V)
SYSBOL FIGURE
PARAMETER
1/t _CLCL
t_LHLL
1
t_AVLL
1
t_LLAX
1
t_LLIV
1
t_LLPL
1
t_PLPH
1
t_PLIV
1
t_PXIX
1
t_PXIZ
1
t_AVIV
1
t_PLAZ
1
Data Memory
Oscillator frequency : Speed Versions
60C32/60C52
ALE pulse width
Address valid to ALE low
Address hold after ALE low
ALE low to valid instruction in
ALE low to PSEN low
PSEN pulse with
PSEN low to valid instruction in
Input instruction hold after PSEN
Input instruction float after PSEN
Address to valid instruction in
PSEN low to address float
12MHz CLOCK
MIN MAX
VARIABLE
CLOCK
MIN MAX
UNIT
3.5
16
MHz
127
43
53
53
205
0
234
145
59
312
10
2t_CLCL-40
t_CLCL-40
t_CLCL-30
4t_CLCL-100
t_CLCL-30
3t_CLCL-45
3_CLCL-105
0
t_CLCL-25
5t_CLCL-105
10
t_RLRH
2, 3
t_WLWH
2, 3
t_RLDV
2, 3
t_RHDX
2, 3
t_RHDZ
2, 3
t_LLDV
2, 3
t_AVDV
2, 3
t_LLWL
2, 3
t_AVWL
2, 3
t_QVWX
2, 3
t_WHQX
2, 3
t_QVWH
2, 3
t_RLAZ
2, 3
t_WHLH
2, 3
External Clock
t_CHCX
4
t_CLCX
4
t_CLCH
4
t_CHCL
4
RD pulse width
WR pulse width
RD low to valid data in
Data hold after RD
Data float after RD
ALE low to valid data in
Address to valid data in
ALE low to RD or WR low
Address valid to WR low or RD low
Data valid to WR transition
Data hold after WR
Data valid to WR High
RD low to address float
RD or WR high to ALE high
High time
Low time
Rise time
Fall time
400
400
0
200
203
33
33
433
43
20
20
252
107
517
585
300
0
123
6t_CLCL-100
6t_CLCL-100
5t_CLCL-165
0
2t_CLCL-70
8t_CLCL-150
9t_CLCL-165
3t_CLCL-50 3t_CLCL+50
4t_CLCL-130
t_CLCL-50
t_CLCL-50
7t_CLCL-150
0
t_CLCL-40
t_CLCL-40
20
20
20
20
20
20
KSI-W015-000
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