SD60C31 Datasheet, PDF (6/12 Pages) AUK corp – CMOS SINGLE-COMPONENT 8-BIT MICROCOMPUTER

Pin Description(continued)
• Crystal oscillator
SD60C31/P SD60C51/P
30pF
30pF
XTAL2
XTAL1
VSS
Idle Mode
In the Idle mode, the CPU puts itself to sleep while all the on chip peripherals stay active.
The instruction that invokes the Idle mode is the last instruction executed in the normal
operating mode before Idle mode is activated.
The content of the on-chip RAM and all the special function registers remain intact during
this mode. The Idle mode can be terminated either by any enabled interrupt, at which
time the process is picked up at the interrupt service routine and continued, or by a
hardware reset which starts the processor the same as a power on reset.
Power Down Mode
In the power down mode the oscillator is stopped, and the instruction that invokes power
down is the last instruction executed. The on-chip RAM and special function register retain
their values until the power down mode is terminated.
The only exit from power down is a hardware reset. Reset redefines the SFRs but does not
change the on-chip RAM. The reset should not be activated before V_CC is restored to its
normal operating level and must be held active long enough to allow the oscillator to
restart and stabilize.
The control bits for the reduced power modes are in the special function register PCON.
Table Status of the external pins during Idle and power down modes.
Mode
Program
memory
ALE PSEN PORT 0 PORT 1
Idle
Internal
1
1
Data
Data
Idle
External
1
1
Float
Data
Power down
Internal
0
0
Data
Data
Power down
External
0
0
Float
Data
PORT 2
Data
Address
Data
Data
PORT 3
Data
Data
Data
Data
KSI-W001-000
6