AT80SND2CMP3B_14 Datasheet, PDF (98/242 Pages) ATMEL Corporation – MPEG I/II-Layer 3 Hardwired Decoder

Table 15-25. DAC Reset Register - DAC_ RST (10h)
7
6
5
4
3
-
-
-
-
-
2
RESMASK
1
RESFILZ
Bit
Number
7:3
Bit Mnemonic
-
Description
Not Used.
2
RESMASK
Active high reset mask of the audio codec
1
RESFILZ
Active low reset of the audio codec filter
0
RSTZ
Active low reset of the audio codec
Reset Value = 00000000b
Note: Refer to Audio DAC Startup sequence.
0
RSTZ
15.2 Power Amplifier
High quality mono output is provided. The DAC output is connected through a buffer stage to the
input of the Audio Power Amplifier, using two coupling capacitors The mono buffer stage also
includes a mixer of the LINEL and LINER inputs as well as a differential monaural auxiliary input
(line level) which can be, for example, the output of a voice CODEC output driver in mobile
phones.
In the full power mode, the Power Amplifier is capable of driving an 8Ω Loudspeaker at maxi-
mum power of 440mW, making it suitable as a handsfree speaker driver in Wireless Handset
Application.
The Low Power Mode is designed to be switched from the handsfree mode to the normal ear-
phone/speaker mode of a telephone handset.
The audio power amplifier is not internally protected against short-circuit. The user should avoid
any short-circuit on the load.
15.2.1
PA Features
• 0.44W on 8Ω Load
• Low Power Mode for Earphone
• Programmable Gain (-22 to +20 dB)
• Fully Differential Structure, Input and Output
Table 15-26. PA Gain
APAGAIN 3:0
0000
0001
0010
0011
0100
0101
Gain (db)
-22
20
17
14
11
8
98 AT8xC51SND2C/MP3B
4341H–MP3–10/07