AT32UC3C0512C Datasheet, PDF (97/110 Pages) ATMEL Corporation – High Performance, Low Power 32-bit AVR Microcontroller

AT32UC3C
10. Errata
10.1 rev E
10.1.1 ADCIFA
10.1.2 AST
10.1.3 aWire
1 ADCREFP/ADCREFN can not be selected as an external ADC reference by setting the
ADCIFA.CFG.EXREF bit to one
Fix/Workaround
A voltage reference can be applied on ADCREFP/ADCREFN pins if the
ADCIFA.CFG.EXREF bit is set to zero, the ADCIFA.CFG.RS bit is set to zero and the volt-
age reference applied on ADCREFP/ADCREFN pins is higher than the internal 1V
reference.
1 AST wake signal is released one AST clock cycle after the BUSY bit is cleared
After writing to the Status Clear Register (SCR) the wake signal is released one AST clock
cycle after the BUSY bit in the Status Register (SR.BUSY) is cleared. If entering sleep mode
directly after the BUSY bit is cleared the part will wake up immediately.
Fix/Workaround
Read the Wake Enable Register (WER) and write this value back to the same register. Wait
for BUSY to clear before entering sleep mode.
1 aWire MEMORY_SPEED_REQUEST command does not return correct CV
The aWire MEMORY_SPEED_REQUEST command does not return a CV corresponding to
the formula in the aWire Debug Interface chapter.
Fix/Workaround
Issue a dummy read to address 0x100000000 before issuing the
MEMORY_SPEED_REQUEST command and use this formula instead:
f_sab
=
----⁷---^f--^a---^w----
CV – 3
10.1.4
Power Manager
1 TWIS may not wake the device from sleep mode
If the CPU is put to a sleep mode (except Idle and Frozen) directly after a TWI Start condi-
tion, the CPU may not wake upon a TWIS address match. The request is NACKed.
Fix/Workaround
When using the TWI address match to wake the device from sleep, do not switch to sleep
modes deeper than Frozen. Another solution is to enable asynchronous EIC wake on the
TWIS clock (TWCK) or TWIS data (TWD) pins, in order to wake the system up on bus
events.
97
32117DS–AVR-01/12