AT73C203_14 Datasheet, PDF (95/106 Pages) ATMEL Corporation – Power Management

AT73C203
Character Repetition for T = 0
Error Counter
Interrupts
RXRDY
Protocol T = 0 allows character repetition.
• Reception
When IRXNACK is set and a parity error is detected, an error signal is not sent. The
received byte is available in the SIM_RHR register and the RXRDY bit is set.
If IRXNACK = 0, the number of character repetitions depends on Disable Successive
Non-Acknowledgment (DSRXNACK) bit and MAX_ITERATION bits, both in SIM_MR.
MAX_ITERATION is a 3-bit field configurable with a value between 0 and 7. This implies
that a character can be repeated up to eight times.
If DSRXNACK = 0, an error signal is sent on the I/O line as soon as a parity error occurs
in the received character.
If DSRXNACK = 1, successive parity errors are counted up to the value specified in the
MAX_ITERATION field. These parity errors generate a error signal on the SIM_IO line.
As soon as this value is reached, no additional error signal is sent on the I/O line. The
flag ITERATION is asserted.
To reset the ITERATION (SIM_MSR) flag, the RSIT bit must be set in the Control Regis-
ter (SIM_CR).
• Transmission
A character repetition can be executed if the MAX_ITERATION field in SIM_MR is differ-
ent from 0.
If MAX_ITERATION = 0, no repetition is done.
If MAX_ITERATION is different from zero and no parity error has been detected, no rep-
etition is done.
If MAX_ITERATION is different from zero and a parity error has been detected, the
transmitter re-sends the corrupted value. If a parity error is still detected, the corrupted
value is sent as many times as the value loaded in the MAX_ITERATION field.
If the number of repetitions of the corrupted value reaches the value loaded in the
MAX_ITERATION field, the ITERATION (SIM_MSR) flag is set. The transmitter is dis-
abled until the ITERATION flag is reset.
If at some stage during the repetition sequence, no error parity is detected, repetition is
stopped.
To reset the ITERATION (SIM_MSR) flag, the RSIT command can be used, but in that
case the transfer will continue if the FIFO is not empty and not all characters would have
been correctly sent. That's why it is recommended to reset the transmitter with the
RSTTX command in the Control Register (SIM_CR).
If errors occurred during a transfer, it is possible to obtain the total number of errors by
reading the register in SIM_NER. This is a read-only register reset by a read action. Up
to 255 errors can be recorded.
All interrupts can be masked in registers SIM_IMR1 and SIM_IMR2
A character has been received.
An interrupt occurs when status bit RXRDY in SIM_CSR is set.
Reset of status bit causes reset of interrupt.
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