ATMEGA103_07 Datasheet, PDF (94/141 Pages) ATMEL Corporation – 8-bit Microcontroller with 128K Bytes In-System Programmable Flash

Port C
The Port C Data Register –
PORTC
Port C Schematics
Port C is an 8-bit output port.
The Port C pins have alternate functions related to the optional external data SRAM.
When using the device with external SRAM, Port C outputs the high-order address byte
during accesses to external Data memory. When a reset condition becomes active, the
port pins are not tri-stated, but the pins will assume their initial value after two stable
clock cycles.
Bit
$15 ($35)
Read/Write
Initial Value
7
PORTC7
R/W
0
6
PORTC6
R/W
0
5
PORTC5
R/W
0
4
PORTC4
R/W
0
3
PORTC3
R/W
0
2
PORTC2
R/W
0
1
PORTC1
R/W
0
0
PORTC0
R/W
0
PORTC
Figure 61. Port C Schematic Diagram (Pins PC0 - PC7)
Port D
PCn
WP:
RL:
A:
SRE:
n:
WRITE PORTC
READ PORTC LATCH
SRAM ADDRESS
EXTERNAL SRAM ENABLE
0-7
RESET
QR D
PORTCn
C
RL
WP
SRE
An
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors.
Three I/O memory address locations are allocated for the Port D, one each for the Data
Register – PORTD, $12($32), Data Direction Register – DDRD, $11($31) and the Port D
Input Pins – PIND, $10($30). The Port D Input Pins address is read-only, while the Data
Register and the Data Direction Register are read/write.
The Port D output buffers can sink 20 mA. As inputs, Port D pins that are externally
pulled low will source current if the pull-up resistors are activated.
Some Port D pins have alternate functions as shown in Table 31.
Table 31. Port D Pin Alternate Functions
Port Pin
Alternate Function
PD0
INT0 (External Interrupt0 Input)
PD1
INT1 (External Interrupt1 Input)
PD2
INT2 (External Interrupt2 Input)
PD3
INT3 (External Interrupt3 Input)
PD4
IC1 (Timer/Counter1 Input Capture Trigger)
PD6
T1 (Timer/Counter1 Clock Input)
PD7
T2 (Timer/Counter2 Clock Input)
94 ATmega103(L)
0945I–AVR–02/07